arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register
Bit 15 in SAR register specifies if TCLK is running at 200 MHz or 250 MHz. Use this information instead of manual configuration in every board file. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
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@@ -17,7 +17,6 @@
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* for DDR ECC byte filling in the SPL before loading the main
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* U-Boot into it.
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*/
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#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
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/* USB/EHCI configuration */
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#define CONFIG_EHCI_IS_TDI
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@@ -20,8 +20,6 @@
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* U-Boot into it.
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*/
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#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
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#define CONFIG_LOADADDR 1000000
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/*
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@@ -10,8 +10,6 @@
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
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/* USB/EHCI configuration */
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#define CONFIG_EHCI_IS_TDI
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@@ -10,8 +10,6 @@
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
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/* I2C */
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#define CONFIG_SYS_I2C_LEGACY
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#define CONFIG_SYS_I2C_MVTWSI
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@@ -17,7 +17,6 @@
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* for DDR ECC byte filling in the SPL before loading the main
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* U-Boot into it.
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*/
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#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
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/* USB/EHCI configuration */
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#define CONFIG_EHCI_IS_TDI
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@@ -16,7 +16,6 @@
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* for DDR ECC byte filling in the SPL before loading the main
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* U-Boot into it.
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*/
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#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
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/* USB/EHCI configuration */
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#define CONFIG_EHCI_IS_TDI
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@@ -12,8 +12,6 @@
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#define CONFIG_DISPLAY_BOARDINFO_LATE
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#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
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/*
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* NS16550 Configuration
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*/
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