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sf: Preserve QE bit when clearing BP# bits for Macronix flash

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On some flash (like Macronix), QE (quad enable) bit is in the same
status register as BP# bits, and we need preserve its original value
during a reboot cycle as this is required by some platforms (like
Intel ICH SPI controller working under descriptor mode).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[Refined code for readability]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Bin Meng 2017-07-23 07:44:37 -07:00 committed by Jagan Teki
parent 8fc2faefdd
commit 294f2050c4
1 changed files with 18 additions and 4 deletions
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22
drivers/mtd/spi/spi_flash.c
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@ -947,11 +947,25 @@ int spi_flash_scan(struct spi_flash *flash)
if (IS_ERR_OR_NULL(info))
return -ENOENT;
/* Flash powers up read-only, so clear BP# bits */
/*
* Flash powers up read-only, so clear BP# bits.
*
* Note on some flash (like Macronix), QE (quad enable) bit is in the
* same status register as BP# bits, and we need preserve its original
* value during a reboot cycle as this is required by some platforms
* (like Intel ICH SPI controller working under descriptor mode).
*/
if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||
JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST)
write_sr(flash, 0);
(JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) ||
(JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX)) {
u8 sr = 0;
if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX) {
read_sr(flash, &sr);
sr &= STATUS_QEB_MXIC;
}
write_sr(flash, sr);
}
flash->name = info->name;
flash->memory_map = spi->memory_map;