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ARM: omap3_logic: Add NOR Flash Support for SOM-LV

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The DM37 and OMAP35 SOM-LV SOM-LV products both support a NOR
flash part connected to CS2 in addition to the NAND part on CS0.
This patch setups the GPMC timings for the MT28 NOR Flash and
enables the CFI-Flash driver now that the CFI stuff is in Kconfig

Signed-off-by: Adam Ford <aford173@gmail.com>
This commit is contained in:
Adam Ford
2018-10-14 15:53:17 -05:00
committed by Tom Rini
parent e18333e501
commit 290097fe27
4 changed files with 70 additions and 7 deletions
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49
board/logicpd/omap3som/omap3logic.c
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@@ -40,6 +40,22 @@
DECLARE_GLOBAL_DATA_PTR;
#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG1 0x00011203
#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG2 0x000A1302
#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG3 0x000F1302
#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG4 0x0A021303
#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG5 0x00120F18
#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG6 0x0A030000
#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG7 0x00000C50
#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG1 0x00011203
#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG2 0x00091102
#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG3 0x000D1102
#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG4 0x09021103
#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG5 0x00100D15
#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG6 0x09030000
#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG7 0x00000C50
/* This is only needed until SPL gets OF support */
#ifdef CONFIG_SPL_BUILD
static const struct ns16550_platdata omap3logic_serial = {
@@ -220,6 +236,28 @@ int misc_init_r(void)
return 0;
}
#if defined(CONFIG_FLASH_CFI_DRIVER)
static const u32 gpmc_dm37_c2nor_config[] = {
LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG1,
LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG2,
LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG3,
LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG4,
LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG5,
LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG6,
LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG7
};
static const u32 gpmc_omap35_c2nor_config[] = {
LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG1,
LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG2,
LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG3,
LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG4,
LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG5,
LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG6,
LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG7
};
#endif
/*
* Routine: board_init
* Description: Early hardware init.
@@ -230,7 +268,16 @@ int board_init(void)
/* boot param addr */
gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
#if defined(CONFIG_FLASH_CFI_DRIVER)
if (get_cpu_family() == CPU_OMAP36XX) {
/* Enable CS2 for NOR Flash */
enable_gpmc_cs_config(gpmc_dm37_c2nor_config, &gpmc_cfg->cs[2],
0x10000000, GPMC_SIZE_64M);
} else {
enable_gpmc_cs_config(gpmc_omap35_c2nor_config, &gpmc_cfg->cs[2],
0x10000000, GPMC_SIZE_64M);
}
#endif
return 0;
}