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mvebu: a38x: Force receiver detected on PCIe lanes

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Some QCA988x based modules presence is not detected by the SERDES lanes,
so force this detection which will trigger the LTSSM state machine to
negotiate link.

An example of such a card is WLE900VX.

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Rabeeh Khoury 2018-05-27 18:34:08 +03:00 committed by Stefan Roese
parent ee1855dc52
commit 28be54dc59
2 changed files with 3 additions and 0 deletions
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2
arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
View File

@ -597,6 +597,8 @@ struct op_params pex_electrical_config_serdes_rev2_params[] = {
{LANE_CFG4_REG, 0x800, 0x8, {0x8}, 0, 0},
/* tximpcal_th and rximpcal_th */
{VTHIMPCAL_CTRL_REG, 0x800, 0xff00, {0x3000}, 0, 0},
/* Force receiver detected */
{LANE_CFG0_REG, 0x800, 0x8000, {0x8000}, 0, 0},
};
/* PEX - configuration seq for REF_CLOCK_25MHz */

1
arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
View File

@ -71,6 +71,7 @@
#define RX_REG3 0xa0188
#define PCIE_REG1 0xa0288
#define PCIE_REG3 0xa0290
#define LANE_CFG0_REG 0xa0600
#define LANE_CFG1_REG 0xa0604
#define LANE_CFG4_REG 0xa0620
#define LANE_CFG5_REG 0xa0624