Merge branch '2022-11-23-assorted-fixes'
- Small ubifs updates, mkenvimage fix, ast2600 ram updates, update CI to make git happier, spelling fix in K3 code and fix dependencies in CMD_CLS
This commit is contained in:
commit
27c415ae8b
@ -362,6 +362,7 @@ stages:
|
||||
cat << "EOF" >> test.sh
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# the below corresponds to .gitlab-ci.yml "before_script"
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cd ${WORK_DIR}
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git config --global --add safe.directory ${WORK_DIR}
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git clone --depth=1 https://source.denx.de/u-boot/u-boot-test-hooks /tmp/uboot-test-hooks
|
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ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`
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ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
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@ -549,6 +550,7 @@ stages:
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cd ${WORK_DIR}
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# make environment variables available as tests are running inside a container
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export BUILDMAN="${BUILDMAN}"
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git config --global --add safe.directory ${WORK_DIR}
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EOF
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cat << "EOF" >> build.sh
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if [[ "${BUILDMAN}" != "" ]]; then
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|
@ -14,6 +14,7 @@ stages:
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stage: test.py
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before_script:
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# Clone uboot-test-hooks
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- git config --global --add safe.directory "${CI_PROJECT_DIR}"
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- git clone --depth=1 https://source.denx.de/u-boot/u-boot-test-hooks /tmp/uboot-test-hooks
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- ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`
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- ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
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@ -81,6 +82,7 @@ build all 32bit ARM platforms:
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stage: world build
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script:
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- ret=0;
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git config --global --add safe.directory "${CI_PROJECT_DIR}";
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./tools/buildman/buildman -o /tmp -PEWM arm -x aarch64 || ret=$?;
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if [[ $ret -ne 0 ]]; then
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./tools/buildman/buildman -o /tmp -seP;
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@ -93,6 +95,7 @@ build all 64bit ARM platforms:
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- virtualenv -p /usr/bin/python3 /tmp/venv
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- . /tmp/venv/bin/activate
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- ret=0;
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git config --global --add safe.directory "${CI_PROJECT_DIR}";
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./tools/buildman/buildman -o /tmp -PEWM aarch64 || ret=$?;
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if [[ $ret -ne 0 ]]; then
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./tools/buildman/buildman -o /tmp -seP;
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@ -103,6 +106,7 @@ build all PowerPC platforms:
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stage: world build
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script:
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- ret=0;
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git config --global --add safe.directory "${CI_PROJECT_DIR}";
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./tools/buildman/buildman -o /tmp -P -E -W powerpc || ret=$?;
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if [[ $ret -ne 0 ]]; then
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./tools/buildman/buildman -o /tmp -seP;
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@ -113,6 +117,7 @@ build all other platforms:
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stage: world build
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script:
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- ret=0;
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git config --global --add safe.directory "${CI_PROJECT_DIR}";
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./tools/buildman/buildman -o /tmp -PEWM -x arm,powerpc || ret=$?;
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if [[ $ret -ne 0 ]]; then
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./tools/buildman/buildman -o /tmp -seP;
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|
@ -104,6 +104,10 @@
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#define SDRAM_FORCE_PRECHARGE_EN BIT(4)
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#define SDRAM_REFRESH_EN BIT(0)
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/* MCR14 */
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#define SDRAM_WL_SETTING GENMASK(23, 20)
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#define SDRAM_CL_SETTING GENMASK(19, 16)
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#define SDRAM_TEST_LEN_SHIFT 4
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#define SDRAM_TEST_LEN_MASK 0xfffff
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#define SDRAM_TEST_START_ADDR_SHIFT 24
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|
@ -26,7 +26,7 @@ static struct rom_extended_boot_data bootdata __section(".data");
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static void store_boot_info_from_rom(void)
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{
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bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
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memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO,
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memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
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sizeof(struct rom_extended_boot_data));
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}
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|
@ -61,7 +61,7 @@ static struct rom_extended_boot_data bootdata __section(".data");
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static void store_boot_info_from_rom(void)
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{
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bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
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memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO,
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memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
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sizeof(struct rom_extended_boot_data));
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}
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|
@ -53,7 +53,7 @@
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#define CTRLMMR_MCU_RST_CTRL (MCU_CTRL_MMR0_BASE + 0x18170)
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#define ROM_ENTENDED_BOOT_DATA_INFO 0x43c3f1e0
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#define ROM_EXTENDED_BOOT_DATA_INFO 0x43c3f1e0
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/* Use Last 2K as Scratch pad */
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#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x70000000
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|
@ -36,7 +36,7 @@
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#define MAIN_DEVSTAT_BACKUP_USB_MODE_MASK 0x01
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#define ROM_ENTENDED_BOOT_DATA_INFO 0x701beb00
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#define ROM_EXTENDED_BOOT_DATA_INFO 0x701beb00
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/* Use Last 2K as Scratch pad */
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#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x7019f800
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|
@ -33,7 +33,7 @@
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#define WKUP_DEVSTAT_MCU_ONLY_SHIFT 6
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/* ROM HANDOFF Structure location */
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#define ROM_ENTENDED_BOOT_DATA_INFO 0x41cffb00
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#define ROM_EXTENDED_BOOT_DATA_INFO 0x41cffb00
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/* MCU SCRATCHPAD usage */
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#define TI_SRAM_SCRATCH_BOARD_EEPROM_START CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE
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|
@ -33,7 +33,7 @@
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#define WKUP_DEVSTAT_MCU_ONLY_SHIFT 6
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/* ROM HANDOFF Structure location */
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#define ROM_ENTENDED_BOOT_DATA_INFO 0x41cfdb00
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#define ROM_EXTENDED_BOOT_DATA_INFO 0x41cfdb00
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/* MCU SCRATCHPAD usage */
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#define TI_SRAM_SCRATCH_BOARD_EEPROM_START CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE
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|
@ -130,7 +130,7 @@ static struct rom_extended_boot_data bootdata __section(".data");
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static void store_boot_info_from_rom(void)
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{
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bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
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memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO,
|
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memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
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sizeof(struct rom_extended_boot_data));
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}
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|
@ -89,7 +89,7 @@ static struct rom_extended_boot_data bootdata __section(".data");
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static void store_boot_info_from_rom(void)
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{
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bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
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memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO,
|
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memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
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sizeof(struct rom_extended_boot_data));
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}
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|
@ -1959,7 +1959,7 @@ config CMD_CONITRACE
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config CMD_CLS
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bool "Enable clear screen command 'cls'"
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default y if LCD || DM_VIDEO
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default y if LCD || VIDEO
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help
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Enable the 'cls' command which clears the screen contents
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on video frame buffer.
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|
@ -33,7 +33,7 @@ int cmd_ubifs_mount(char *vol_name)
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ret = uboot_ubifs_mount(vol_name);
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if (ret)
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return -1;
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return CMD_RET_FAILURE;
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ubifs_mounted = 1;
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@ -62,7 +62,7 @@ int cmd_ubifs_umount(void)
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{
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if (ubifs_initialized == 0) {
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printf("No UBIFS volume mounted!\n");
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return -1;
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return CMD_RET_FAILURE;
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}
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||||
uboot_ubifs_umount();
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@ -89,7 +89,7 @@ static int do_ubifs_ls(struct cmd_tbl *cmdtp, int flag, int argc,
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if (!ubifs_mounted) {
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printf("UBIFS not mounted, use ubifsmount to mount volume first!\n");
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return -1;
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return CMD_RET_FAILURE;
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}
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if (argc == 2)
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@ -116,7 +116,7 @@ static int do_ubifs_load(struct cmd_tbl *cmdtp, int flag, int argc,
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if (!ubifs_mounted) {
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printf("UBIFS not mounted, use ubifs mount to mount volume first!\n");
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return -1;
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return CMD_RET_FAILURE;
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}
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if (argc < 3)
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|
@ -15,11 +15,125 @@
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#include <asm/global_data.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <linux/bitfield.h>
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#include <dt-bindings/clock/ast2600-clock.h>
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#define DDR_PHY_TBL_CHG_ADDR 0xaeeddeea
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#define DDR_PHY_TBL_END 0xaeededed
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/**
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* phyr030[18:16] - Ron PU (PHY side)
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* phyr030[14:12] - Ron PD (PHY side)
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* b'000 : disable
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* b'001 : 240 ohm
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* b'010 : 120 ohm
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* b'011 : 80 ohm
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* b'100 : 60 ohm
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* b'101 : 48 ohm
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* b'110 : 40 ohm
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* b'111 : 34 ohm (default)
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*/
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#define PHY_RON ((0x7 << 16) | (0x7 << 12))
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/**
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* phyr030[10:8] - ODT configuration (PHY side)
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* b'000 : ODT disabled
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* b'001 : 240 ohm
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* b'010 : 120 ohm
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* b'011 : 80 ohm (default)
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* b'100 : 60 ohm
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* b'101 : 48 ohm
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* b'110 : 40 ohm
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* b'111 : 34 ohm
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*/
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#define PHY_ODT (0x3 << 8)
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/**
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* MR1[2:1] output driver impedance
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* b'00 : 34 ohm (default)
|
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* b'01 : 48 ohm
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*/
|
||||
#define DRAM_RON (0x0 << 1)
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|
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/**
|
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* DRAM ODT - synchronous ODT mode
|
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* RTT_WR: disable
|
||||
* RTT_NOM = RTT_PARK
|
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*
|
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* MR1[10:8] RTT_NOM
|
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* b'000 : RTT_NOM disable
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||||
* b'001 : 60 ohm
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||||
* b'010 : 120 ohm
|
||||
* b'011 : 40 ohm
|
||||
* b'100 : 240 ohm
|
||||
* b'101 : 48 ohm (default)
|
||||
* b'110 : 80 ohm
|
||||
* b'111 : 34 ohm
|
||||
*
|
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* MR5[8:6] RTT_PARK
|
||||
* b'000 : RTT_PARK disable
|
||||
* b'001 : 60 ohm
|
||||
* b'010 : 120 ohm
|
||||
* b'011 : 40 ohm
|
||||
* b'100 : 240 ohm
|
||||
* b'101 : 48 ohm (default)
|
||||
* b'110 : 80 ohm
|
||||
* b'111 : 34 ohm
|
||||
*
|
||||
* MR2[11:9] RTT_WR
|
||||
* b'000 : Dynamic ODT off (default)
|
||||
* b'001 : 120 ohm
|
||||
* b'010 : 240 ohm
|
||||
* b'011 : Hi-Z
|
||||
* b'100 : 80 ohm
|
||||
*/
|
||||
#define RTT_WR (0x0 << 9)
|
||||
#define RTT_NOM (0x5 << 8)
|
||||
#define RTT_PARK (0x5 << 6)
|
||||
|
||||
/**
|
||||
* MR6[6] VrefDQ training range
|
||||
* b'0 : range 1
|
||||
* b'1 : range 2 (default)
|
||||
*/
|
||||
#define VREFDQ_RANGE_2 BIT(6)
|
||||
|
||||
/**
|
||||
* Latency setting:
|
||||
* AL = PL = 0 (hardware fixed setting)
|
||||
* -> WL = AL + CWL + PL = CWL
|
||||
* -> RL = AL + CL + PL = CL
|
||||
*/
|
||||
#define CONFIG_WL 9
|
||||
#define CONFIG_RL 12
|
||||
#define T_RDDATA_EN ((CONFIG_RL - 2) << 8)
|
||||
#define T_PHY_WRLAT (CONFIG_WL - 2)
|
||||
|
||||
/* MR0 */
|
||||
#define MR0_CL_12 (BIT(4) | BIT(2))
|
||||
#define MR0_WR12_RTP6 BIT(9)
|
||||
#define MR0_DLL_RESET BIT(8)
|
||||
#define MR0_VAL (MR0_CL_12 | MR0_WR12_RTP6 | MR0_DLL_RESET)
|
||||
|
||||
/* MR1 */
|
||||
#define MR1_VAL (0x0001 | RTT_NOM | DRAM_RON)
|
||||
|
||||
/* MR2 */
|
||||
#define MR2_CWL_9 0
|
||||
#define MR2_VAL (0x0000 | RTT_WR | MR2_CWL_9)
|
||||
|
||||
/* MR3 ~ MR6 */
|
||||
#define MR3_VAL 0x0000
|
||||
#define MR4_VAL 0x0000
|
||||
#define MR5_VAL (0x0400 | RTT_PARK)
|
||||
#define MR6_VAL 0x0400
|
||||
|
||||
/**
|
||||
* The offset value applied to the DDR PHY write data eye training result
|
||||
* to fine-tune the write DQ/DQS alignment
|
||||
*/
|
||||
#define WR_DATA_EYE_OFFSET (0x10 << 8)
|
||||
|
||||
#if defined(CONFIG_ASPEED_DDR4_800)
|
||||
u32 ast2600_sdramphy_config[165] = {
|
||||
0x1e6e0100, // start address
|
||||
@ -35,7 +149,7 @@ u32 ast2600_sdramphy_config[165] = {
|
||||
0x20000000, // phyr024
|
||||
0x00000008, // phyr028
|
||||
0x00000000, // phyr02c
|
||||
0x00077600, // phyr030
|
||||
(PHY_RON | PHY_ODT), /* phyr030 */
|
||||
0x00000000, // phyr034
|
||||
0x00000000, // phyr038
|
||||
0x20000000, // phyr03c
|
||||
@ -44,18 +158,18 @@ u32 ast2600_sdramphy_config[165] = {
|
||||
0x00002f07, // phyr048
|
||||
0x00003080, // phyr04c
|
||||
0x04000000, // phyr050
|
||||
0x00000200, // phyr054
|
||||
0x03140201, // phyr058
|
||||
0x04800000, // phyr05c
|
||||
0x0800044e, // phyr060
|
||||
((MR3_VAL << 16) | MR2_VAL), /* phyr054 */
|
||||
((MR0_VAL << 16) | MR1_VAL), /* phyr058 */
|
||||
((MR5_VAL << 16) | MR4_VAL), /* phyr05c */
|
||||
((0x0800 << 16) | MR6_VAL | VREFDQ_RANGE_2 | 0xe), /* phyr060 */
|
||||
0x00000000, // phyr064
|
||||
0x00180008, // phyr068
|
||||
0x00e00400, // phyr06c
|
||||
0x00140206, // phyr070
|
||||
0x1d4c0000, // phyr074
|
||||
0x493e0107, // phyr078
|
||||
(0x493e0100 | T_PHY_WRLAT), /* phyr078 */
|
||||
0x08060404, // phyr07c
|
||||
0x90000a00, // phyr080
|
||||
(0x90000000 | T_RDDATA_EN), /* phyr080 */
|
||||
0x06420618, // phyr084
|
||||
0x00001002, // phyr088
|
||||
0x05701016, // phyr08c
|
||||
@ -94,7 +208,7 @@ u32 ast2600_sdramphy_config[165] = {
|
||||
0x20202020, // phyr09c
|
||||
0x20202020, // phyr0a0
|
||||
0x00002020, // phyr0a4
|
||||
0x80000000, // phyr0a8
|
||||
0x00000000, /* phyr0a8 */
|
||||
0x00000001, // phyr0ac
|
||||
0xaeeddeea, // change address
|
||||
0x1e6e0318, // new address
|
||||
@ -154,7 +268,7 @@ u32 ast2600_sdramphy_config[165] = {
|
||||
0x20202020, // phyr170
|
||||
0xaeeddeea, // change address
|
||||
0x1e6e0298, // new address
|
||||
0x20200800, // phyr198
|
||||
0x20200000, /* phyr198 */
|
||||
0x20202020, // phyr19c
|
||||
0x20202020, // phyr1a0
|
||||
0x20202020, // phyr1a4
|
||||
@ -177,7 +291,7 @@ u32 ast2600_sdramphy_config[165] = {
|
||||
0x00002020, // phyr1e8
|
||||
0xaeeddeea, // change address
|
||||
0x1e6e0304, // new address
|
||||
0x00000800, // phyr204
|
||||
(0x00000001 | WR_DATA_EYE_OFFSET), /* phyr204 */
|
||||
0xaeeddeea, // change address
|
||||
0x1e6e027c, // new address
|
||||
0x4e400000, // phyr17c
|
||||
@ -203,7 +317,7 @@ u32 ast2600_sdramphy_config[165] = {
|
||||
0x20000000, // phyr024
|
||||
0x00000008, // phyr028
|
||||
0x00000000, // phyr02c
|
||||
0x00077600, // phyr030
|
||||
(PHY_RON | PHY_ODT), /* phyr030 */
|
||||
0x00000000, // phyr034
|
||||
0x00000000, // phyr038
|
||||
0x20000000, // phyr03c
|
||||
@ -212,18 +326,18 @@ u32 ast2600_sdramphy_config[165] = {
|
||||
0x00002f07, // phyr048
|
||||
0x00003080, // phyr04c
|
||||
0x04000000, // phyr050
|
||||
0x00000200, // phyr054
|
||||
0x03140501, // phyr058-rtt:40
|
||||
0x04800000, // phyr05c
|
||||
0x0800044e, // phyr060
|
||||
((MR3_VAL << 16) | MR2_VAL), /* phyr054 */
|
||||
((MR0_VAL << 16) | MR1_VAL), /* phyr058 */
|
||||
((MR5_VAL << 16) | MR4_VAL), /* phyr05c */
|
||||
((0x0800 << 16) | MR6_VAL | VREFDQ_RANGE_2 | 0xe), /* phyr060 */
|
||||
0x00000000, // phyr064
|
||||
0x00180008, // phyr068
|
||||
0x00e00400, // phyr06c
|
||||
0x00140206, // phyr070
|
||||
0x1d4c0000, // phyr074
|
||||
0x493e0107, // phyr078
|
||||
(0x493e0100 | T_PHY_WRLAT), /* phyr078 */
|
||||
0x08060404, // phyr07c
|
||||
0x90000a00, // phyr080
|
||||
(0x90000000 | T_RDDATA_EN), /* phyr080 */
|
||||
0x06420c30, // phyr084
|
||||
0x00001002, // phyr088
|
||||
0x05701016, // phyr08c
|
||||
@ -256,13 +370,13 @@ u32 ast2600_sdramphy_config[165] = {
|
||||
0x00000000, // phyr200
|
||||
0xaeeddeea, // change address
|
||||
0x1e6e0194, // new address
|
||||
0x801112e0, // phyr094 - bit12=1,15=0,- write window is ok
|
||||
0x801112e0, // phyr094
|
||||
0xaeeddeea, // change address
|
||||
0x1e6e019c, // new address
|
||||
0x20202020, // phyr09c
|
||||
0x20202020, // phyr0a0
|
||||
0x00002020, // phyr0a4
|
||||
0x80000000, // phyr0a8
|
||||
0x00000000, /* phyr0a8 */
|
||||
0x00000001, // phyr0ac
|
||||
0xaeeddeea, // change address
|
||||
0x1e6e0318, // new address
|
||||
@ -322,7 +436,7 @@ u32 ast2600_sdramphy_config[165] = {
|
||||
0x20202020, // phyr170
|
||||
0xaeeddeea, // change address
|
||||
0x1e6e0298, // new address
|
||||
0x20200800, // phyr198
|
||||
0x20200000, /* phyr198 */
|
||||
0x20202020, // phyr19c
|
||||
0x20202020, // phyr1a0
|
||||
0x20202020, // phyr1a4
|
||||
@ -345,7 +459,7 @@ u32 ast2600_sdramphy_config[165] = {
|
||||
0x00002020, // phyr1e8
|
||||
0xaeeddeea, // change address
|
||||
0x1e6e0304, // new address
|
||||
0x00000800, // phyr204
|
||||
(0x00000001 | WR_DATA_EYE_OFFSET), /* phyr204 */
|
||||
0xaeeddeea, // change address
|
||||
0x1e6e027c, // new address
|
||||
0x4e400000, // phyr17c
|
||||
@ -388,10 +502,10 @@ u32 ast2600_sdramphy_config[165] = {
|
||||
* AC timing and SDRAM mode register setting
|
||||
* for real chip are derived from the model GDDR4-1600
|
||||
*/
|
||||
#define DDR4_MR01_MODE 0x03010510
|
||||
#define DDR4_MR23_MODE 0x00000000
|
||||
#define DDR4_MR45_MODE 0x04000000
|
||||
#define DDR4_MR6_MODE 0x00000400
|
||||
#define DDR4_MR01_MODE ((MR1_VAL << 16) | MR0_VAL)
|
||||
#define DDR4_MR23_MODE ((MR3_VAL << 16) | MR2_VAL)
|
||||
#define DDR4_MR45_MODE ((MR5_VAL << 16) | MR4_VAL)
|
||||
#define DDR4_MR6_MODE MR6_VAL
|
||||
#define DDR4_TRFC_1600 0x467299f1
|
||||
#define DDR4_TRFC_1333 0x3a5f80c9
|
||||
#define DDR4_TRFC_800 0x23394c78
|
||||
@ -449,7 +563,7 @@ static void ast2600_sdramphy_kick_training(struct dram_info *info)
|
||||
|
||||
while (1) {
|
||||
data = readl(®s->phy_ctrl[0]) & SDRAM_PHYCTRL0_INIT;
|
||||
if (~data)
|
||||
if (data == 0)
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -822,6 +936,7 @@ static void ast2600_sdrammc_lock(struct dram_info *info)
|
||||
static void ast2600_sdrammc_common_init(struct ast2600_sdrammc_regs *regs)
|
||||
{
|
||||
int i;
|
||||
u32 reg;
|
||||
|
||||
writel(MCR34_MREQI_DIS | MCR34_RESETN_DIS, ®s->power_ctrl);
|
||||
writel(SDRAM_VIDEO_UNLOCK_KEY, ®s->gm_protection_key);
|
||||
@ -856,6 +971,13 @@ static void ast2600_sdrammc_common_init(struct ast2600_sdrammc_regs *regs)
|
||||
for (i = 0; i < ARRAY_SIZE(ddr4_ac_timing); ++i)
|
||||
writel(ddr4_ac_timing[i], ®s->ac_timing[i]);
|
||||
|
||||
/* update CL and WL */
|
||||
reg = readl(®s->ac_timing[1]);
|
||||
reg &= ~(SDRAM_WL_SETTING | SDRAM_CL_SETTING);
|
||||
reg |= FIELD_PREP(SDRAM_WL_SETTING, CONFIG_WL - 5) |
|
||||
FIELD_PREP(SDRAM_CL_SETTING, CONFIG_RL - 5);
|
||||
writel(reg, ®s->ac_timing[1]);
|
||||
|
||||
writel(DDR4_MR01_MODE, ®s->mr01_mode_setting);
|
||||
writel(DDR4_MR23_MODE, ®s->mr23_mode_setting);
|
||||
writel(DDR4_MR45_MODE, ®s->mr45_mode_setting);
|
||||
@ -984,11 +1106,6 @@ static int ast2600_sdrammc_probe(struct udevice *dev)
|
||||
L_ast2600_sdramphy_train:
|
||||
ast2600_sdrammc_init_ddr4(priv);
|
||||
|
||||
/* make sure DDR-PHY is ready before access */
|
||||
do {
|
||||
reg = readl(priv->phy_status) & BIT(1);
|
||||
} while (reg == 0);
|
||||
|
||||
if (ast2600_sdramphy_check_status(priv) != 0) {
|
||||
printf("DDR4 PHY training fail, retrain\n");
|
||||
goto L_ast2600_sdramphy_train;
|
||||
|
@ -4,3 +4,11 @@ config UBIFS_SILENCE_MSG
|
||||
help
|
||||
Make the verbose messages from UBIFS stop printing. This leaves
|
||||
warnings and errors enabled.
|
||||
|
||||
config UBIFS_SILENCE_DEBUG_DUMP
|
||||
bool "UBIFS silence debug dumps"
|
||||
default y if UBIFS_SILENCE_MSG
|
||||
default n
|
||||
help
|
||||
Make the debug dumps from UBIFS stop printing.
|
||||
This decreases size of U-Boot binary.
|
||||
|
@ -35,6 +35,7 @@
|
||||
static DEFINE_SPINLOCK(dbg_lock);
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
|
||||
static const char *get_key_fmt(int fmt)
|
||||
{
|
||||
switch (fmt) {
|
||||
@ -230,6 +231,7 @@ static void dump_ch(const struct ubifs_ch *ch)
|
||||
(unsigned long long)le64_to_cpu(ch->sqnum));
|
||||
pr_err("\tlen %u\n", le32_to_cpu(ch->len));
|
||||
}
|
||||
#endif
|
||||
|
||||
void ubifs_dump_inode(struct ubifs_info *c, const struct inode *inode)
|
||||
{
|
||||
@ -303,6 +305,7 @@ void ubifs_dump_inode(struct ubifs_info *c, const struct inode *inode)
|
||||
|
||||
void ubifs_dump_node(const struct ubifs_info *c, const void *node)
|
||||
{
|
||||
#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
|
||||
int i, n;
|
||||
union ubifs_key key;
|
||||
const struct ubifs_ch *ch = node;
|
||||
@ -546,10 +549,12 @@ void ubifs_dump_node(const struct ubifs_info *c, const void *node)
|
||||
(int)ch->node_type);
|
||||
}
|
||||
spin_unlock(&dbg_lock);
|
||||
#endif
|
||||
}
|
||||
|
||||
void ubifs_dump_budget_req(const struct ubifs_budget_req *req)
|
||||
{
|
||||
#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
|
||||
spin_lock(&dbg_lock);
|
||||
pr_err("Budgeting request: new_ino %d, dirtied_ino %d\n",
|
||||
req->new_ino, req->dirtied_ino);
|
||||
@ -563,10 +568,12 @@ void ubifs_dump_budget_req(const struct ubifs_budget_req *req)
|
||||
pr_err("\tdata_growth %d dd_growth %d\n",
|
||||
req->data_growth, req->dd_growth);
|
||||
spin_unlock(&dbg_lock);
|
||||
#endif
|
||||
}
|
||||
|
||||
void ubifs_dump_lstats(const struct ubifs_lp_stats *lst)
|
||||
{
|
||||
#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
|
||||
spin_lock(&dbg_lock);
|
||||
pr_err("(pid %d) Lprops statistics: empty_lebs %d, idx_lebs %d\n",
|
||||
current->pid, lst->empty_lebs, lst->idx_lebs);
|
||||
@ -575,6 +582,7 @@ void ubifs_dump_lstats(const struct ubifs_lp_stats *lst)
|
||||
pr_err("\ttotal_used %lld, total_dark %lld, total_dead %lld\n",
|
||||
lst->total_used, lst->total_dark, lst->total_dead);
|
||||
spin_unlock(&dbg_lock);
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifndef __UBOOT__
|
||||
@ -653,6 +661,7 @@ void ubifs_dump_budg(struct ubifs_info *c, const struct ubifs_budg_info *bi)
|
||||
|
||||
void ubifs_dump_lprop(const struct ubifs_info *c, const struct ubifs_lprops *lp)
|
||||
{
|
||||
#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
|
||||
int i, spc, dark = 0, dead = 0;
|
||||
struct rb_node *rb;
|
||||
struct ubifs_bud *bud;
|
||||
@ -740,6 +749,7 @@ void ubifs_dump_lprop(const struct ubifs_info *c, const struct ubifs_lprops *lp)
|
||||
if (lp->lnum == c->gc_lnum)
|
||||
pr_cont(", GC LEB");
|
||||
pr_cont(")\n");
|
||||
#endif
|
||||
}
|
||||
|
||||
void ubifs_dump_lprops(struct ubifs_info *c)
|
||||
@ -766,6 +776,7 @@ void ubifs_dump_lprops(struct ubifs_info *c)
|
||||
|
||||
void ubifs_dump_lpt_info(struct ubifs_info *c)
|
||||
{
|
||||
#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
|
||||
int i;
|
||||
|
||||
spin_lock(&dbg_lock);
|
||||
@ -800,11 +811,13 @@ void ubifs_dump_lpt_info(struct ubifs_info *c)
|
||||
i + c->lpt_first, c->ltab[i].free, c->ltab[i].dirty,
|
||||
c->ltab[i].tgc, c->ltab[i].cmt);
|
||||
spin_unlock(&dbg_lock);
|
||||
#endif
|
||||
}
|
||||
|
||||
void ubifs_dump_sleb(const struct ubifs_info *c,
|
||||
const struct ubifs_scan_leb *sleb, int offs)
|
||||
{
|
||||
#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
|
||||
struct ubifs_scan_node *snod;
|
||||
|
||||
pr_err("(pid %d) start dumping scanned data from LEB %d:%d\n",
|
||||
@ -816,10 +829,12 @@ void ubifs_dump_sleb(const struct ubifs_info *c,
|
||||
sleb->lnum, snod->offs, snod->len);
|
||||
ubifs_dump_node(c, snod->node);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void ubifs_dump_leb(const struct ubifs_info *c, int lnum)
|
||||
{
|
||||
#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
|
||||
struct ubifs_scan_leb *sleb;
|
||||
struct ubifs_scan_node *snod;
|
||||
void *buf;
|
||||
@ -854,11 +869,13 @@ void ubifs_dump_leb(const struct ubifs_info *c, int lnum)
|
||||
out:
|
||||
vfree(buf);
|
||||
return;
|
||||
#endif
|
||||
}
|
||||
|
||||
void ubifs_dump_znode(const struct ubifs_info *c,
|
||||
const struct ubifs_znode *znode)
|
||||
{
|
||||
#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
|
||||
int n;
|
||||
const struct ubifs_zbranch *zbr;
|
||||
char key_buf[DBG_KEY_BUF_LEN];
|
||||
@ -893,10 +910,12 @@ void ubifs_dump_znode(const struct ubifs_info *c,
|
||||
DBG_KEY_BUF_LEN));
|
||||
}
|
||||
spin_unlock(&dbg_lock);
|
||||
#endif
|
||||
}
|
||||
|
||||
void ubifs_dump_heap(struct ubifs_info *c, struct ubifs_lpt_heap *heap, int cat)
|
||||
{
|
||||
#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
|
||||
int i;
|
||||
|
||||
pr_err("(pid %d) start dumping heap cat %d (%d elements)\n",
|
||||
@ -909,11 +928,13 @@ void ubifs_dump_heap(struct ubifs_info *c, struct ubifs_lpt_heap *heap, int cat)
|
||||
lprops->dirty, lprops->flags);
|
||||
}
|
||||
pr_err("(pid %d) finish dumping heap\n", current->pid);
|
||||
#endif
|
||||
}
|
||||
|
||||
void ubifs_dump_pnode(struct ubifs_info *c, struct ubifs_pnode *pnode,
|
||||
struct ubifs_nnode *parent, int iip)
|
||||
{
|
||||
#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
|
||||
int i;
|
||||
|
||||
pr_err("(pid %d) dumping pnode:\n", current->pid);
|
||||
@ -927,10 +948,12 @@ void ubifs_dump_pnode(struct ubifs_info *c, struct ubifs_pnode *pnode,
|
||||
pr_err("\t%d: free %d dirty %d flags %d lnum %d\n",
|
||||
i, lp->free, lp->dirty, lp->flags, lp->lnum);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void ubifs_dump_tnc(struct ubifs_info *c)
|
||||
{
|
||||
#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
|
||||
struct ubifs_znode *znode;
|
||||
int level;
|
||||
|
||||
@ -948,14 +971,17 @@ void ubifs_dump_tnc(struct ubifs_info *c)
|
||||
znode = ubifs_tnc_levelorder_next(c->zroot.znode, znode);
|
||||
}
|
||||
pr_err("(pid %d) finish dumping TNC tree\n", current->pid);
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
|
||||
static int dump_znode(struct ubifs_info *c, struct ubifs_znode *znode,
|
||||
void *priv)
|
||||
{
|
||||
ubifs_dump_znode(c, znode);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* ubifs_dump_index - dump the on-flash index.
|
||||
@ -966,7 +992,9 @@ static int dump_znode(struct ubifs_info *c, struct ubifs_znode *znode,
|
||||
*/
|
||||
void ubifs_dump_index(struct ubifs_info *c)
|
||||
{
|
||||
#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
|
||||
dbg_walk_index(c, NULL, dump_znode, NULL);
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifndef __UBOOT__
|
||||
|
@ -14,7 +14,6 @@
|
||||
#include <stdlib.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include <u-boot/crc.h>
|
||||
#include <unistd.h>
|
||||
#include <libgen.h>
|
||||
#include <sys/types.h>
|
||||
|
Loading…
Reference in New Issue
Block a user