da8xx/hawkboard: Add support for ohci host controller
Also enable the ohci port on hawkboard. These additions result in an increased u-boot size -- adjust the same accordingly in the board's config. Move the usb header for da8xx platforms under arch-davinci. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
This commit is contained in:
Sughosh Ganu
Albert ARIBAUD
parent
975b71bc10
commit
25f8bf6eff
@ -128,6 +128,11 @@ void lpsc_syncreset(unsigned int id)
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lpsc_transition(id, 0x01);
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}
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void lpsc_disable(unsigned int id)
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{
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lpsc_transition(id, 0x0);
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}
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/* Not all DaVinci chips have a DSP power domain. */
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#ifdef CONFIG_SOC_DM644X
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@ -1,5 +1,5 @@
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/*
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* da8xx.h -- TI's DA8xx platform specific usb wrapper definitions.
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* da8xx-usb.h -- TI's DA8xx platform specific usb wrapper definitions.
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*
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* Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
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*
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@ -26,7 +26,6 @@
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#include <asm/arch/hardware.h>
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#include <asm/arch/gpio.h>
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#include "musb_core.h"
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/* Base address of da8xx usb0 wrapper */
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#define DA8XX_USB_OTG_BASE 0x01E00000
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@ -99,4 +98,8 @@ struct da8xx_usb_regs {
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#define CFGCHIP2_REFFREQ_48MHZ (3 << 0)
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#define DA8XX_USB_VBUS_GPIO (1 << 15)
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int usb_phy_on(void);
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void usb_phy_off(void);
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#endif /* __DA8XX_MUSB_H__ */
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@ -306,6 +306,7 @@ typedef volatile unsigned int * dv_reg_p;
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void lpsc_on(unsigned int id);
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void lpsc_syncreset(unsigned int id);
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void lpsc_disable(unsigned int id);
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void dsp_on(void);
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void davinci_enable_uart0(void);
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@ -4,6 +4,7 @@
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* Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com>
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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* Copyright (C) 2004 Texas Instruments.
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* Copyright (C) 2012 Sughosh Ganu <urwithsughosh@gmail.com>.
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*
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* ----------------------------------------------------------------------------
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* This program is free software; you can redistribute it and/or modify
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@ -28,6 +29,7 @@
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#include <asm/io.h>
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#include <asm/arch/davinci_misc.h>
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#include <asm/arch/pinmux_defs.h>
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#include <asm/arch/da8xx-usb.h>
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#include <ns16550.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -89,3 +91,42 @@ int misc_init_r(void)
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return 0;
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}
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int usb_phy_on(void)
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{
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u32 timeout;
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u32 cfgchip2;
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cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
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cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN |
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CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ |
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CFGCHIP2_USB1PHYCLKMUX);
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cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON |
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CFGCHIP2_REFFREQ_24MHZ | CFGCHIP2_USB2PHYCLKMUX |
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CFGCHIP2_USB1SUSPENDM;
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writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
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/* wait until the usb phy pll locks */
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timeout = DA8XX_USB_OTG_TIMEOUT;
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while (timeout--)
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if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD)
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return 1;
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/* USB phy was not turned on */
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return 0;
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}
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void usb_phy_off(void)
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{
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u32 cfgchip2;
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/*
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* Power down the on-chip PHY.
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*/
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cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
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cfgchip2 &= ~(CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM);
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cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_RESET;
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writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
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}
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@ -28,6 +28,7 @@ LIB := $(obj)libusb_host.o
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# ohci
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COBJS-$(CONFIG_USB_OHCI_NEW) += ohci-hcd.o
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COBJS-$(CONFIG_USB_ATMEL) += ohci-at91.o
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COBJS-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o
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COBJS-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
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COBJS-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
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COBJS-$(CONFIG_USB_S3C64XX) += s3c64xx-hcd.o
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48
drivers/usb/host/ohci-da8xx.c
Normal file
48
drivers/usb/host/ohci-da8xx.c
Normal file
@ -0,0 +1,48 @@
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/*
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* Copyright (C) 2012 Sughosh Ganu <urwithsughosh@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <asm/arch/da8xx-usb.h>
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int usb_cpu_init(void)
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{
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/* enable psc for usb2.0 */
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lpsc_on(DAVINCI_LPSC_USB20);
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/* enable psc for usb1.0 */
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lpsc_on(DAVINCI_LPSC_USB11);
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/* start the on-chip usb phy and its pll */
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if (usb_phy_on())
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return 0;
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return 1;
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}
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int usb_cpu_stop(void)
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{
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usb_phy_off();
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/* turn off the usb clock and assert the module reset */
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lpsc_disable(DAVINCI_LPSC_USB11);
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lpsc_disable(DAVINCI_LPSC_USB20);
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return 0;
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}
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int usb_cpu_init_fail(void)
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{
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return usb_cpu_stop();
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}
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@ -23,7 +23,8 @@
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*/
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#include <common.h>
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#include "da8xx.h"
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#include "musb_core.h"
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#include <asm/arch/da8xx-usb.h>
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/* MUSB platform configuration */
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struct musb_config musb_cfg = {
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@ -137,7 +137,7 @@
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#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000
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#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000
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#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
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#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
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#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \
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@ -158,6 +158,16 @@
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#endif /* CONFIG_SYS_USE_NAND */
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/* USB Configs */
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_USB_OHCI_DA8XX
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#define CONFIG_USB_STORAGE
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#define CONFIG_DOS_PARTITION
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#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x01E25000
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "hawkboard"
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/*
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* U-Boot general configuration
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*/
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@ -200,6 +210,8 @@
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_SAVES
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_EXT2
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#ifdef CONFIG_CMD_BDI
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#define CONFIG_CLOCKS
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