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Convert CONFIG_SYS_MEM_TOP_HIDE to Kconfig

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This converts the following to Kconfig:
   CONFIG_SYS_MEM_TOP_HIDE

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-04-06 10:33:32 -04:00
parent bdf9831226
commit 24c904f309
18 changed files with 21 additions and 41 deletions
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11
Kconfig
View File

@ -489,6 +489,17 @@ config STACK_SIZE
by the UEFI sub-system. On some boards initrd_high is calculated as
base stack pointer minus this stack size.
config SYS_MEM_TOP_HIDE
hex "Exclude some memory from U-Boot / OS information"
default 0x0
help
If set, this specified memory area will get subtracted from the top
(end) of RAM and won't get "touched" at all by U-Boot. By fixing up
gd->ram_size the OS / next stage should gets passed the now
"corrected" memory size and won't touch it either.
WARNING: Please make sure that this value is a multiple of the OS
page size.
config SYS_HAS_SRAM
bool
default y if TARGET_PIC32MZDASK

21
README
View File

@ -1876,27 +1876,6 @@ Configuration Settings:
the RAM base is not zero, or RAM is divided into banks,
this variable needs to be recalcuated to get the address.
- CONFIG_SYS_MEM_TOP_HIDE:
If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
this specified memory area will get subtracted from the top
(end) of RAM and won't get "touched" at all by U-Boot. By
fixing up gd->ram_size the Linux kernel should gets passed
the now "corrected" memory size and won't touch it either.
This should work for arch/ppc and arch/powerpc. Only Linux
board ports in arch/powerpc with bootwrapper support that
recalculate the memory size from the SDRAM controller setup
will have to get fixed in Linux additionally.
This option can be used as a workaround for the 440EPx/GRx
CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
be touched.
WARNING: Please make sure that this value is a multiple of
the Linux page size (normally 4k). If this is not the case,
then the end address of the Linux memory will be located at a
non page size aligned address and this could cause major
problems.
- CONFIG_SYS_LOADS_BAUD_CHANGE:
Enable temporary baudrate change while serial download

4
board/samsung/common/board.c
View File

@ -107,9 +107,9 @@ int board_init(void)
}
boot_temp_check();
#endif
#ifdef CONFIG_TZSW_RESERVED_DRAM_SIZE
#if CONFIG_VAL(SYS_MEM_TOP_HIDE)
/* The last few MB of memory can be reserved for secure firmware */
ulong size = CONFIG_TZSW_RESERVED_DRAM_SIZE;
ulong size = CONFIG_SYS_MEM_TOP_HIDE;
gd->ram_size -= size;
gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= size;

2
common/board_f.c
View File

@ -327,7 +327,7 @@ static int setup_dest_addr(void)
* Ram is setup, size stored in gd !!
*/
debug("Ram size: %08lX\n", (ulong)gd->ram_size);
#if defined(CONFIG_SYS_MEM_TOP_HIDE)
#if CONFIG_VAL(SYS_MEM_TOP_HIDE)
/*
* Subtract specified amount of memory to hide so that it won't
* get "touched" at all by U-Boot. By fixing up gd->ram_size

1
configs/odroid-xu3_defconfig
View File

@ -13,6 +13,7 @@ CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2"
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SYS_MEM_TOP_HIDE=0x01600000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y

1
configs/odroid_defconfig
View File

@ -14,6 +14,7 @@ CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid"
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SYS_MEM_TOP_HIDE=0x00100000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y

1
configs/origen_defconfig
View File

@ -16,6 +16,7 @@ CONFIG_SPL=y
CONFIG_IDENT_STRING=" for ORIGEN"
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_MEM_TOP_HIDE=0x100000
CONFIG_BOOTCOMMAND="if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootenv; then echo Loaded environment from ${bootenv};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;if run loadbootscript; then run bootscript; fi; fi;load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y

1
configs/s5pc210_universal_defconfig
View File

@ -13,6 +13,7 @@ CONFIG_ENV_OFFSET=0x7000
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210"
CONFIG_SYS_LOAD_ADDR=0x44800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_MEM_TOP_HIDE=0x100000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="Please use defined boot"
CONFIG_BOOTCOMMAND="run mmcboot"

1
configs/theadorable_debug_defconfig
View File

@ -20,6 +20,7 @@ CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DEBUG_UART=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SYS_MEM_TOP_HIDE=0x80000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y

1
configs/trats2_defconfig
View File

@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2"
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SYS_MEM_TOP_HIDE=0x100000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y

1
configs/trats_defconfig
View File

@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x7000
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats"
CONFIG_SYS_LOAD_ADDR=0x44800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_MEM_TOP_HIDE=0x100000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y

3
include/configs/odroid.h
View File

@ -21,9 +21,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
/* Reserve the last 1 MiB for the secure firmware */
#define CONFIG_SYS_MEM_TOP_HIDE (1UL << 20UL)
#define CONFIG_TZSW_RESERVED_DRAM_SIZE CONFIG_SYS_MEM_TOP_HIDE
#include <linux/sizes.h>

3
include/configs/odroid_xu3.h
View File

@ -15,9 +15,6 @@
#define TZPC_BASE_OFFSET 0x10000
#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
/* Reserve the last 22 MiB for the secure firmware */
#define CONFIG_SYS_MEM_TOP_HIDE (22UL << 20UL)
#define CONFIG_TZSW_RESERVED_DRAM_SIZE CONFIG_SYS_MEM_TOP_HIDE
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000)

2
include/configs/origen.h
View File

@ -19,8 +19,6 @@
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
/* Power Down Modes */
#define S5P_CHECK_SLEEP 0x00000BAD
#define S5P_CHECK_DIDLE 0xBAD00000

2
include/configs/s5pc210_universal.h
View File

@ -24,8 +24,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
- GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
/* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
#define NORMAL_MTDPARTS_DEFAULT CONFIG_MTDPARTS_DEFAULT

3
include/configs/theadorable.h
View File

@ -43,9 +43,6 @@
/* SATA support */
#define CONFIG_LBA48
/* Enable LCD and reserve 512KB from top of memory*/
#define CONFIG_SYS_MEM_TOP_HIDE 0x80000
/* FPGA programming support */
#define CONFIG_FPGA_STRATIX_V

2
include/configs/trats.h
View File

@ -28,8 +28,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
- GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
/* Tizen - partitions definitions */
#define PARTS_CSA "csa-mmc"
#define PARTS_BOOT "boot"

2
include/configs/trats2.h
View File

@ -27,8 +27,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
- GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
/* Tizen - partitions definitions */
#define PARTS_CSA "csa-mmc"
#define PARTS_BOOT "boot"