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Merge branch '2022-04-19-assorted-updates'

Browse Source 
- Migrate CONFIG_SYS_MEM_TOP_HIDE to Kconfig, IOMUX bugfix, 2 BTRFS
bugfixes, update .gitignore and .mailmap files, aspeed GPIO bugfix,
image-fit and squashfs code cleanups, enable EXT4 and ISO partitions on
DeveloperBox.
- populate u-boot,bootconf under /chosen, see
  https://github.com/devicetree-org/dt-schema/pull/71 for corresponding
  change
This commit is contained in:
Tom Rini 2022-04-19 17:02:21 -04:00
commit 246e03476b
34 changed files with 56 additions and 75 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
.mailmap
View File

@ -43,6 +43,7 @@ Marek Vasut <marex@denx.de> <marex at denx.de>
Markus Klotzbuecher <mk@denx.de>
Masahiro Yamada <yamada.masahiro@socionext.com> <yamada.m@jp.panasonic.com>
Masahiro Yamada <yamada.masahiro@socionext.com> <masahiroy@kernel.org>
Michal Simek <michal.simek@amd.com> <michal.simek@xilinx.com>
Michal Simek <michal.simek@xilinx.com> <monstr@monstr.eu>
Michal Simek <michal.simek@xilinx.com> <Monstr@seznam.cz>
Michal Simek <michal.simek@xilinx.com> <root@monstr.eu>

11
Kconfig
View File

@ -489,6 +489,17 @@ config STACK_SIZE
by the UEFI sub-system. On some boards initrd_high is calculated as
base stack pointer minus this stack size.
config SYS_MEM_TOP_HIDE
hex "Exclude some memory from U-Boot / OS information"
default 0x0
help
If set, this specified memory area will get subtracted from the top
(end) of RAM and won't get "touched" at all by U-Boot. By fixing up
gd->ram_size the OS / next stage should gets passed the now
"corrected" memory size and won't touch it either.
WARNING: Please make sure that this value is a multiple of the OS
page size.
config SYS_HAS_SRAM
bool
default y if TARGET_PIC32MZDASK

8
MAINTAINERS
View File

@ -594,7 +594,7 @@ F: configs/uniphier_*_defconfig
N: uniphier
ARM VERSAL
M: Michal Simek <michal.simek@xilinx.com>
M: Michal Simek <michal.simek@amd.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/mach-versal/
@ -639,7 +639,7 @@ F: tools/zynqimage.c
N: zynq
ARM ZYNQMP
M: Michal Simek <michal.simek@xilinx.com>
M: Michal Simek <michal.simek@amd.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/mach-zynqmp/
@ -676,7 +676,7 @@ N: ultra96
N: zynqmp
ARM ZYNQMP R5
M: Michal Simek <michal.simek@xilinx.com>
M: Michal Simek <michal.simek@amd.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/mach-zynqmp-r5/
@ -852,7 +852,7 @@ F: net/fastboot.c
F: test/dm/fastboot.c
FPGA
M: Michal Simek <michal.simek@xilinx.com>
M: Michal Simek <michal.simek@amd.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
F: drivers/fpga/

21
README
View File

@ -1876,27 +1876,6 @@ Configuration Settings:
the RAM base is not zero, or RAM is divided into banks,
this variable needs to be recalcuated to get the address.
- CONFIG_SYS_MEM_TOP_HIDE:
If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
this specified memory area will get subtracted from the top
(end) of RAM and won't get "touched" at all by U-Boot. By
fixing up gd->ram_size the Linux kernel should gets passed
the now "corrected" memory size and won't touch it either.
This should work for arch/ppc and arch/powerpc. Only Linux
board ports in arch/powerpc with bootwrapper support that
recalculate the memory size from the SDRAM controller setup
will have to get fixed in Linux additionally.
This option can be used as a workaround for the 440EPx/GRx
CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
be touched.
WARNING: Please make sure that this value is a multiple of
the Linux page size (normally 4k). If this is not the case,
then the end address of the Linux memory will be located at a
non page size aligned address and this could cause major
problems.
- CONFIG_SYS_LOADS_BAUD_CHANGE:
Enable temporary baudrate change while serial download

4
board/samsung/common/board.c
View File

@ -107,9 +107,9 @@ int board_init(void)
}
boot_temp_check();
#endif
#ifdef CONFIG_TZSW_RESERVED_DRAM_SIZE
#if CONFIG_VAL(SYS_MEM_TOP_HIDE)
/* The last few MB of memory can be reserved for secure firmware */
ulong size = CONFIG_TZSW_RESERVED_DRAM_SIZE;
ulong size = CONFIG_SYS_MEM_TOP_HIDE;
gd->ram_size -= size;
gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= size;

2
board/xilinx/versal/MAINTAINERS
View File

@ -1,5 +1,5 @@
XILINX_VERSAL BOARDS
M: Michal Simek <michal.simek@xilinx.com>
M: Michal Simek <michal.simek@amd.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/dts/versal*

2
board/xilinx/zynqmp/MAINTAINERS
View File

@ -1,5 +1,5 @@
XILINX_ZYNQMP BOARDS
M: Michal Simek <michal.simek@xilinx.com>
M: Michal Simek <michal.simek@amd.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/dts/zynqmp-*

2
board/xilinx/zynqmp_r5/MAINTAINERS
View File

@ -1,5 +1,5 @@
XILINX_ZYNQMP_R5 BOARDS
M: Michal Simek <michal.simek@xilinx.com>
M: Michal Simek <michal.simek@amd.com>
S: Maintained
F: arch/arm/dts/zynqmp-r5*
F: board/xilinx/zynqmp_r5/

6
boot/image-fdt.c
View File

@ -601,6 +601,12 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
goto err;
}
/* Store name of configuration node as u-boot,bootconf in /chosen node */
if (images->fit_uname_cfg)
fdt_find_and_setprop(blob, "/chosen", "u-boot,bootconf",
images->fit_uname_cfg,
strlen(images->fit_uname_cfg) + 1, 1);
/* Update ethernet nodes */
fdt_fixup_ethernet(blob);
#if CONFIG_IS_ENABLED(CMD_PSTORE)

12
boot/image-fit.c
View File

@ -1887,8 +1887,7 @@ int fit_conf_get_node(const void *fit, const char *conf_uname)
conf_uname, fdt_strerror(noffset));
}
if (conf_uname_copy)
free(conf_uname_copy);
free(conf_uname_copy);
return noffset;
}
@ -2422,9 +2421,6 @@ int boot_get_fdt_fit(bootm_headers_t *images, ulong addr,
}
fdt_pack(base);
len = fdt_totalsize(base);
free(ovcopy);
ovcopy = NULL;
}
#else
printf("config with overlays but CONFIG_OF_LIBFDT_OVERLAY not set\n");
@ -2442,11 +2438,9 @@ out:
*fit_uname_configp = fit_uname_config;
#ifdef CONFIG_OF_LIBFDT_OVERLAY
if (ovcopy)
free(ovcopy);
free(ovcopy);
#endif
if (fit_uname_config_copy)
free(fit_uname_config_copy);
free(fit_uname_config_copy);
return fdt_noffset;
}
#endif

2
common/board_f.c
View File

@ -327,7 +327,7 @@ static int setup_dest_addr(void)
* Ram is setup, size stored in gd !!
*/
debug("Ram size: %08lX\n", (ulong)gd->ram_size);
#if defined(CONFIG_SYS_MEM_TOP_HIDE)
#if CONFIG_VAL(SYS_MEM_TOP_HIDE)
/*
* Subtract specified amount of memory to hide so that it won't
* get "touched" at all by U-Boot. By fixing up gd->ram_size

1
configs/odroid-xu3_defconfig
View File

@ -13,6 +13,7 @@ CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2"
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SYS_MEM_TOP_HIDE=0x01600000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y

1
configs/odroid_defconfig
View File

@ -14,6 +14,7 @@ CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid"
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SYS_MEM_TOP_HIDE=0x00100000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y

1
configs/origen_defconfig
View File

@ -16,6 +16,7 @@ CONFIG_SPL=y
CONFIG_IDENT_STRING=" for ORIGEN"
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_MEM_TOP_HIDE=0x100000
CONFIG_BOOTCOMMAND="if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootenv; then echo Loaded environment from ${bootenv};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;if run loadbootscript; then run bootscript; fi; fi;load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y

1
configs/s5pc210_universal_defconfig
View File

@ -13,6 +13,7 @@ CONFIG_ENV_OFFSET=0x7000
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210"
CONFIG_SYS_LOAD_ADDR=0x44800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_MEM_TOP_HIDE=0x100000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="Please use defined boot"
CONFIG_BOOTCOMMAND="run mmcboot"

2
configs/synquacer_developerbox_defconfig
View File

@ -37,6 +37,7 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_LOG=y
CONFIG_ISO_PARTITION=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
@ -85,6 +86,7 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PCI=y
CONFIG_USB_STORAGE=y
CONFIG_FS_EXT4=y
CONFIG_EFI_SET_TIME=y
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
CONFIG_EFI_CAPSULE_ON_DISK=y

1
configs/theadorable_debug_defconfig
View File

@ -20,6 +20,7 @@ CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DEBUG_UART=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SYS_MEM_TOP_HIDE=0x80000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y

1
configs/trats2_defconfig
View File

@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2"
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SYS_MEM_TOP_HIDE=0x100000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y

1
configs/trats_defconfig
View File

@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x7000
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats"
CONFIG_SYS_LOAD_ADDR=0x44800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_MEM_TOP_HIDE=0x100000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y

4
drivers/gpio/gpio-aspeed.c
View File

@ -211,7 +211,7 @@ static int aspeed_gpio_direction_output(struct udevice *dev, unsigned int offset
struct aspeed_gpio_priv *priv = dev_get_priv(dev);
const struct aspeed_gpio_bank *bank = to_bank(offset);
u32 dir = readl(bank_reg(priv, bank, reg_dir));
u32 output = readl(bank_reg(priv, bank, reg_val));
u32 output = readl(bank_reg(priv, bank, reg_rdata));
dir |= GPIO_BIT(offset);
writel(dir, bank_reg(priv, bank, reg_dir));
@ -239,7 +239,7 @@ aspeed_gpio_set_value(struct udevice *dev, unsigned int offset, int value)
{
struct aspeed_gpio_priv *priv = dev_get_priv(dev);
const struct aspeed_gpio_bank *bank = to_bank(offset);
u32 data = readl(bank_reg(priv, bank, reg_val));
u32 data = readl(bank_reg(priv, bank, reg_rdata));
if (value)
data |= GPIO_BIT(offset);

2
fs/btrfs/btrfs.h
View File

@ -9,7 +9,7 @@
#define __BTRFS_BTRFS_H__
#include <linux/rbtree.h>
#include "conv-funcs.h"
#include "ctree.h"
extern struct btrfs_info btrfs_info;
extern struct btrfs_fs_info *current_fs_info;

2
fs/btrfs/ctree.h
View File

@ -13,7 +13,7 @@
#include <compiler.h>
#include <linux/rbtree.h>
#include <linux/bug.h>
#include <linux/unaligned/le_byteshift.h>
#include <asm/unaligned.h>
#include <u-boot/crc.h>
#include "kernel-shared/btrfs_tree.h"
#include "crypto/hash.h"

2
fs/fs.c
View File

@ -288,6 +288,7 @@ static struct fstype_info fstypes[] = {
},
#endif
#endif
#ifndef CONFIG_SPL_BUILD
#ifdef CONFIG_FS_BTRFS
{
.fstype = FS_TYPE_BTRFS,
@ -307,6 +308,7 @@ static struct fstype_info fstypes[] = {
.ln = fs_ln_unsupported,
},
#endif
#endif
#if IS_ENABLED(CONFIG_FS_SQUASHFS)
{
.fstype = FS_TYPE_SQUASHFS,

13
fs/squashfs/sqfs.c
View File

@ -1310,7 +1310,7 @@ static int sqfs_get_lregfile_info(struct squashfs_lreg_inode *lreg,
int sqfs_read(const char *filename, void *buf, loff_t offset, loff_t len,
loff_t *actread)
{
char *dir = NULL, *fragment_block, *datablock = NULL, *data_buffer = NULL;
char *dir = NULL, *fragment_block, *datablock = NULL;
char *fragment = NULL, *file = NULL, *resolved, *data;
u64 start, n_blks, table_size, data_offset, table_offset, sparse_size;
int ret, j, i_number, datablk_count = 0;
@ -1440,6 +1440,8 @@ int sqfs_read(const char *filename, void *buf, loff_t offset, loff_t len,
}
for (j = 0; j < datablk_count; j++) {
char *data_buffer;
start = data_offset / ctxt.cur_dev->blksz;
table_size = SQFS_BLOCK_SIZE(finfo.blk_sizes[j]);
table_offset = data_offset - (start * ctxt.cur_dev->blksz);
@ -1501,9 +1503,7 @@ int sqfs_read(const char *filename, void *buf, loff_t offset, loff_t len,
}
data_offset += table_size;
if (data_buffer)
free(data_buffer);
data_buffer = NULL;
free(data_buffer);
if (*actread >= len)
break;
}
@ -1563,10 +1563,7 @@ int sqfs_read(const char *filename, void *buf, loff_t offset, loff_t len,
out:
free(fragment);
if (datablk_count) {
free(data_buffer);
free(datablock);
}
free(datablock);
free(file);
free(dir);
free(finfo.blk_sizes);

3
include/configs/odroid.h
View File

@ -21,9 +21,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
/* Reserve the last 1 MiB for the secure firmware */
#define CONFIG_SYS_MEM_TOP_HIDE (1UL << 20UL)
#define CONFIG_TZSW_RESERVED_DRAM_SIZE CONFIG_SYS_MEM_TOP_HIDE
#include <linux/sizes.h>

3
include/configs/odroid_xu3.h
View File

@ -15,9 +15,6 @@
#define TZPC_BASE_OFFSET 0x10000
#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
/* Reserve the last 22 MiB for the secure firmware */
#define CONFIG_SYS_MEM_TOP_HIDE (22UL << 20UL)
#define CONFIG_TZSW_RESERVED_DRAM_SIZE CONFIG_SYS_MEM_TOP_HIDE
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000)

2
include/configs/origen.h
View File

@ -19,8 +19,6 @@
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
/* Power Down Modes */
#define S5P_CHECK_SLEEP 0x00000BAD
#define S5P_CHECK_DIDLE 0xBAD00000

2
include/configs/s5pc210_universal.h
View File

@ -24,8 +24,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
- GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
/* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
#define NORMAL_MTDPARTS_DEFAULT CONFIG_MTDPARTS_DEFAULT

3
include/configs/theadorable.h
View File

@ -43,9 +43,6 @@
/* SATA support */
#define CONFIG_LBA48
/* Enable LCD and reserve 512KB from top of memory*/
#define CONFIG_SYS_MEM_TOP_HIDE 0x80000
/* FPGA programming support */
#define CONFIG_FPGA_STRATIX_V

2
include/configs/trats.h
View File

@ -28,8 +28,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
- GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
/* Tizen - partitions definitions */
#define PARTS_CSA "csa-mmc"
#define PARTS_BOOT "boot"

2
include/configs/trats2.h
View File

@ -27,8 +27,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
- GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
/* Tizen - partitions definitions */
#define PARTS_CSA "csa-mmc"
#define PARTS_BOOT "boot"

8
include/iomux.h
View File

@ -24,10 +24,10 @@ extern struct stdio_dev **console_devices[MAX_FILES];
*/
extern int cd_count[MAX_FILES];
#define for_each_console_dev(i, file, dev) \
for (i = 0, dev = console_devices[file][i]; \
i < cd_count[file]; \
i++, dev = console_devices[file][i])
#define for_each_console_dev(i, file, dev) \
for (i = 0; \
i < cd_count[file] && (dev = console_devices[file][i]); \
i++)
int iomux_match_device(struct stdio_dev **, const int, struct stdio_dev *);
int iomux_doenv(const int, const char *);

2
scripts/config_whitelist.txt
View File

@ -1334,7 +1334,6 @@ CONFIG_SYS_MEMORY_BASE
CONFIG_SYS_MEMORY_SIZE
CONFIG_SYS_MEM_RESERVE_SECURE
CONFIG_SYS_MEM_SIZE
CONFIG_SYS_MEM_TOP_HIDE
CONFIG_SYS_MFD
CONFIG_SYS_MHZ
CONFIG_SYS_MIPS_TIMER_FREQ
@ -1858,7 +1857,6 @@ CONFIG_TSECV2
CONFIG_TSECV2_1
CONFIG_TSEC_TBICR_SETTINGS
CONFIG_TWL6030_POWER
CONFIG_TZSW_RESERVED_DRAM_SIZE
CONFIG_UBIFS_VOLUME
CONFIG_UBI_PART
CONFIG_UBI_SIZE

1
tools/.gitignore vendored
View File

@ -36,3 +36,4 @@
/update_octeon_header
/version.h
/xway-swap-bytes
/boot