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ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 2

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If d != 0 after sdr_working_phase() finishes, the else branch
of the condition has no impact on anything at all, since work_end
was already set independently of the value of "d" . Zap this
useless code.

Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Marek Vasut 2015-07-19 07:00:26 +02:00
parent 2f3589ca54
commit 23e8ea901a
1 changed files with 0 additions and 10 deletions
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10
drivers/ddr/altera/sequencer.c
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@ -1630,16 +1630,6 @@ static uint32_t rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(u32 grp)
debug_cond(DLEVEL == 2, "%s:%d p: ptap=%u\n",
__func__, __LINE__, p);
} else {
/*
* Step 3-5b: Find the right edge of the window
* using delay taps.
*/
debug_cond(DLEVEL == 2,
"%s:%d ptap=%u dtap=%u bgn=%u\n",
__func__, __LINE__, p, d, work_bgn);
work_end = work_bgn;
}
/* The dtap increment to find the failing edge is done here. */