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arm: s5pc1xx: Move CONFIG_SYS_CLK_FREQ_C1x0 out of CONFIG namespace

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The values CONFIG_SYS_CLK_FREQ_C100 and CONFIG_SYS_CLK_FREQ_C110 are
only used in one place and not changed by the board config file.  Move
these out of the CONFIG namespace and in to the CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2021-12-14 13:36:36 -05:00
parent ba1ed5b022
commit 2196a4a7ef
2 changed files with 4 additions and 11 deletions
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12
arch/arm/mach-s5pc1xx/clock.c
View File

@ -14,12 +14,8 @@
#define CLK_D 1
#define CLK_P 2
#ifndef CONFIG_SYS_CLK_FREQ_C100
#define CONFIG_SYS_CLK_FREQ_C100 12000000
#endif
#ifndef CONFIG_SYS_CLK_FREQ_C110
#define CONFIG_SYS_CLK_FREQ_C110 24000000
#endif
#define CFG_SYS_CLK_FREQ_C100 12000000
#define CFG_SYS_CLK_FREQ_C110 24000000
/* s5pc110: return pll clock frequency */
static unsigned long s5pc100_get_pll_clk(int pllreg)
@ -66,7 +62,7 @@ static unsigned long s5pc100_get_pll_clk(int pllreg)
s = r & 0x7;
/* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
freq = CONFIG_SYS_CLK_FREQ_C100;
freq = CFG_SYS_CLK_FREQ_C100;
fout = m * (freq / (p * (1 << s)));
return fout;
@ -116,7 +112,7 @@ static unsigned long s5pc110_get_pll_clk(int pllreg)
/* SDIV [2:0] */
s = r & 0x7;
freq = CONFIG_SYS_CLK_FREQ_C110;
freq = CFG_SYS_CLK_FREQ_C110;
if (pllreg == APLL) {
if (s < 1)
s = 1;

3
include/configs/s5p_goni.h
View File

@ -18,9 +18,6 @@
#include <linux/sizes.h>
#include <asm/arch/cpu.h> /* get chip and board defs */
/* input clock of PLL: has 24MHz input clock at S5PC110 */
#define CONFIG_SYS_CLK_FREQ_C110 24000000
/* DRAM Base */
#define CONFIG_SYS_SDRAM_BASE 0x30000000