sf: doc: Add documentation for the 'sf' command
This command is fairly complicated so documentation is useful. Unfortunately I an not sure how the MTD side of things works and cannot find information about that. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Simon Glass
parent
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@ -45,6 +45,7 @@ Shell commands
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qfw
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reset
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sbi
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sf
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scp03
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setexpr
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size
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245
doc/usage/sf.rst
Normal file
245
doc/usage/sf.rst
Normal file
@ -0,0 +1,245 @@
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.. SPDX-License-Identifier: GPL-2.0+:
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sf command
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==========
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Synopis
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-------
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::
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sf probe [[[<bus>:]<cs>] [<hz> [<mode>]]]
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sf read <addr> <offset>|<partition> <len>
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sf write <addr> <offset>|<partition> <len>
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sf erase <offset>|<partition> <len>
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sf update <addr> <offset>|<partition> <len>
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sf protect lock|unlock <sector> <len>
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sf test <offset>|<partition> <len>
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Description
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-----------
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The *sf* command is used to access SPI flash, supporting read/write/erase and
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a few other functions.
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Probe
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-----
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The flash must first be probed with *sf probe* before any of the other
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subcommands can be used. All of the parameters are optional:
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bus
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SPI bus number containing the SPI-flash chip, e.g. 0. If you don't know
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the number, you can use 'dm uclass' to see all the spi devices,
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and check the value for 'seq' for each one (here 0 and 2)::
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uclass 89: spi
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0 spi@0 @ 05484960, seq 0
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1 spi@1 @ 05484b40, seq 2
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cs
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SPI chip-select to use for the chip. This is often 0 and can be omitted,
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but in some cases multiple slaves are attached to a SPI controller,
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selected by a chip-select line for each one.
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hz
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Speed of the SPI bus in hertz. This normally defaults to 100000, i.e.
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100KHz, which is very slow. Note that if the device exists in the
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device tree, there might be a speed provided there, in which case this
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setting is ignored.
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mode
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SPI mode to use:
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===== ================
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Mode Meaning
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===== ================
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0 CPOL=0, CPHA=0
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1 CPOL=0, CPHA=1
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2 CPOL=1, CPHA=0
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3 CPOL=1, CPHA=1
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===== ================
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Clock phase (CPHA) 0 means that data is transferred (sampled) on the
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first clock edge; 1 means the second.
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Clock polarity (CPOL) controls the idle state of the clock, 0 for low,
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1 for high.
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The active state is the opposite of idle.
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You may find this `SPI documentation`_ useful.
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Parameters for other subcommands (described below) are as follows:
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addr
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Memory address to start transfer
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offset
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Flash offset to start transfer
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partition
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If the parameter is not numeric, it is assumed to be a partition
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description in the format <dev_type><dev_num>,<part_num> which is not
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covered here. This requires CONFIG_CMD_MTDPARTS.
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len
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Number of bytes to transfer
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Read
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~~~~
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Use *sf read* to read from SPI flash to memory. The read will fail if an
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attempt is made to read past the end of the flash.
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Write
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~~~~~
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Use *sf write* to write from memory to SPI flash. The SPI flash should be
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erased first, since otherwise the result is undefined.
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The write will fail if an attempt is made to read past the end of the flash.
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Erase
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~~~~~
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Use *sf erase* to erase a region of SPI flash. The erase will fail if any part
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of the region to be erased is protected or lies past the end of the flash. It
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may also fail if the start offset or length are not aligned to an erase region
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(e.g. 256 bytes).
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Update
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~~~~~~
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Use *sf update* to automatically erase and update a region of SPI flash from
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memory. This works a sector at a time (typical 4KB or 64KB). For each
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sector it first checks if the sector already has the right data. If so it is
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skipped. If not, the sector is erased and the new data written. Note that if
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the length is not a multiple of the erase size, the space after the data in
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the last sector will be erased. If the offset does not start at the beginning
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of an erase block, the operation will fail.
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Speed statistics are shown including the number of bytes that were already
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correct.
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Protect
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~~~~~~~
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SPI-flash chips often have a protection feature where the chip is split up into
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regions which can be locked or unlocked. With *sf protect* it is possible to
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change these settings, if supported by the driver.
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lock|unlock
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Selects whether to lock or unlock the sectors
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<sector>
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Start sector number to lock/unlock. This may be the byte offset or some
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other value, depending on the chip.
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<len>
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Number of bytes to lock/unlock
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Test
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~~~~
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A convenient and fast *sf test* subcommand provides a way to check that SPI
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flash is working as expected. This works in four stages:
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* erase - erases the entire region
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* check - checks that the region is erased
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* write - writes a test pattern to the region, consisting of the U-Boot code
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* read - reads back the test pattern to check that it was written correctly
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Memory is allocated for two buffers, each <len> bytes in size. At typical
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size is 64KB to 1MB. The offset and size must be aligned to an erase boundary.
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Note that this test will fail if any part of the SPI flash is write-protected.
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Examples
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--------
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This first example uses sandbox::
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=> sf probe
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SF: Detected m25p16 with page size 256 Bytes, erase size 64 KiB, total 2 MiB
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=> sf read 1000 1100 80000
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device 0 offset 0x1100, size 0x80000
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SF: 524288 bytes @ 0x1100 Read: OK
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=> md 1000
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00001000: edfe0dd0 f33a0000 78000000 84250000 ......:....x..%.
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00001010: 28000000 11000000 10000000 00000000 ...(............
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00001020: 6f050000 0c250000 00000000 00000000 ...o..%.........
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00001030: 00000000 00000000 00000000 00000000 ................
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00001040: 00000000 00000000 00000000 00000000 ................
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00001050: 00000000 00000000 00000000 00000000 ................
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00001060: 00000000 00000000 00000000 00000000 ................
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00001070: 00000000 00000000 01000000 00000000 ................
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00001080: 03000000 04000000 00000000 01000000 ................
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00001090: 03000000 04000000 0f000000 01000000 ................
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000010a0: 03000000 08000000 1b000000 646e6173 ............sand
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000010b0: 00786f62 03000000 08000000 21000000 box............!
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000010c0: 646e6173 00786f62 01000000 61696c61 sandbox.....alia
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000010d0: 00736573 03000000 07000000 2c000000 ses............,
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000010e0: 6332692f 00003040 03000000 07000000 /i2c@0..........
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000010f0: 31000000 6963702f 00003040 03000000 ...1/pci@0......
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=> sf erase 0 80000
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SF: 524288 bytes @ 0x0 Erased: OK
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=> sf read 1000 1100 80000
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device 0 offset 0x1100, size 0x80000
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SF: 524288 bytes @ 0x1100 Read: OK
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=> md 1000
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00001000: ffffffff ffffffff ffffffff ffffffff ................
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00001010: ffffffff ffffffff ffffffff ffffffff ................
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00001020: ffffffff ffffffff ffffffff ffffffff ................
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00001030: ffffffff ffffffff ffffffff ffffffff ................
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00001040: ffffffff ffffffff ffffffff ffffffff ................
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00001050: ffffffff ffffffff ffffffff ffffffff ................
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00001060: ffffffff ffffffff ffffffff ffffffff ................
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00001070: ffffffff ffffffff ffffffff ffffffff ................
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00001080: ffffffff ffffffff ffffffff ffffffff ................
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00001090: ffffffff ffffffff ffffffff ffffffff ................
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000010a0: ffffffff ffffffff ffffffff ffffffff ................
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000010b0: ffffffff ffffffff ffffffff ffffffff ................
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000010c0: ffffffff ffffffff ffffffff ffffffff ................
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000010d0: ffffffff ffffffff ffffffff ffffffff ................
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000010e0: ffffffff ffffffff ffffffff ffffffff ................
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000010f0: ffffffff ffffffff ffffffff ffffffff ................
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This second example is running on coral, an x86 Chromebook::
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=> sf probe
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SF: Detected w25q128fw with page size 256 Bytes, erase size 4 KiB, total 16 MiB
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=> sf erase 300000 80000
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SF: 524288 bytes @ 0x300000 Erased: OK
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=> sf update 1110000 300000 80000
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device 0 offset 0x300000, size 0x80000
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524288 bytes written, 0 bytes skipped in 0.457s, speed 1164578 B/s
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# This does nothing as the flash is already updated
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=> sf update 1110000 300000 80000
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device 0 offset 0x300000, size 0x80000
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0 bytes written, 524288 bytes skipped in 0.196s, speed 2684354 B/s
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=> sf test 00000 80000 # try a protected region
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SPI flash test:
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Erase failed (err = -5)
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Test failed
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=> sf test 800000 80000
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SPI flash test:
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0 erase: 18 ticks, 28444 KiB/s 227.552 Mbps
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1 check: 192 ticks, 2666 KiB/s 21.328 Mbps
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2 write: 227 ticks, 2255 KiB/s 18.040 Mbps
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3 read: 189 ticks, 2708 KiB/s 21.664 Mbps
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Test passed
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0 erase: 18 ticks, 28444 KiB/s 227.552 Mbps
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1 check: 192 ticks, 2666 KiB/s 21.328 Mbps
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2 write: 227 ticks, 2255 KiB/s 18.040 Mbps
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3 read: 189 ticks, 2708 KiB/s 21.664 Mbps
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.. _SPI documentation:
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https://en.wikipedia.org/wiki/Serial_Peripheral_Interface
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