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armv8: ls1012ardb: Add TFABOOT support

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TFABOOT support includes:
 - ls1012ardb_tfa_defconfig to be loaded by trusted firmware
 - environment address and size changes for TFABOOT
 - define BOOTCOMMAND for TFABOOT
 - enable PFE validation for secure boot

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Rajesh Bhagat
2018-11-05 18:02:53 +00:00
committed by York Sun
parent 8aa6b17a4d
commit 1f6180dff9
7 changed files with 158 additions and 2 deletions
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4
board/freescale/ls1012ardb/Kconfig
View File

@@ -33,6 +33,10 @@ config SYS_LS_PFE_FW_ADDR
hex "Flash address of PFE firmware"
default 0x40a00000
config SYS_LS_PFE_ESBC_ADDR
hex "PFE Firmware HDR Addr"
default 0x40700000
config DDR_PFE_PHYS_BASEADDR
hex "PFE DDR physical base address"
default 0x03800000

2
board/freescale/ls1012ardb/MAINTAINERS
View File

@@ -1,9 +1,11 @@
LS1012ARDB BOARD
M: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
M: Rajesh Bhagat <rajesh.bhagat@nxp.com>
S: Maintained
F: board/freescale/ls1012ardb/
F: include/configs/ls1012ardb.h
F: configs/ls1012ardb_qspi_defconfig
F: configs/ls1012ardb_tfa_defconfig
M: Sumit Garg <sumit.garg@nxp.com>
S: Maintained

16
board/freescale/ls1012ardb/ls1012ardb.c
View File

@@ -87,8 +87,19 @@ int checkboard(void)
return 0;
}
#ifdef CONFIG_TFABOOT
int dram_init(void)
{
gd->ram_size = tfa_get_dram_size();
if (!gd->ram_size)
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
return 0;
}
#else
int dram_init(void)
{
#ifndef CONFIG_TFABOOT
static const struct fsl_mmdc_info mparam = {
0x05180000, /* mdctl */
0x00030035, /* mdpdc */
@@ -106,6 +117,7 @@ int dram_init(void)
};
mmdc_init(&mparam);
#endif
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
@@ -115,6 +127,7 @@ int dram_init(void)
return 0;
}
#endif
int board_early_init_f(void)
@@ -132,7 +145,8 @@ int board_init(void)
* Set CCI-400 control override register to enable barrier
* transaction
*/
out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
if (current_el() == 3)
out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
erratum_a010315();