arm: socfpga: sockit: Remove Micrel PHY configuration
The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
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@ -12,10 +12,6 @@
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#include <usb/dwc2_udc.h>
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#include <usb_mass_storage.h>
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#include <micrel.h>
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#include <netdev.h>
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#include <phy.h>
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DECLARE_GLOBAL_DATA_PTR;
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void s_init(void) {}
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@ -31,42 +27,6 @@ int board_init(void)
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return 0;
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}
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/*
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* PHY configuration
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*/
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#ifdef CONFIG_PHY_MICREL_KSZ9021
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int board_phy_config(struct phy_device *phydev)
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{
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int ret;
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/*
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* These skew settings for the KSZ9021 ethernet phy is required for ethernet
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* to work reliably on most flavors of cyclone5 boards.
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*/
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ret = ksz9021_phy_extended_write(phydev,
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MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
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0x0);
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if (ret)
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return ret;
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ret = ksz9021_phy_extended_write(phydev,
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MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW,
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0x0);
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if (ret)
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return ret;
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ret = ksz9021_phy_extended_write(phydev,
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MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
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0xf0f0);
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if (ret)
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return ret;
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if (phydev->drv->config)
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return phydev->drv->config(phydev);
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return 0;
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}
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#endif
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#ifdef CONFIG_USB_GADGET
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struct dwc2_plat_otg_data socfpga_otg_data = {
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.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
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@ -47,15 +47,8 @@
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/* Ethernet on SoC (EMAC) */
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#if defined(CONFIG_CMD_NET)
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/* PHY */
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#define CONFIG_PHY_MICREL
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#define CONFIG_PHY_MICREL_KSZ9021
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#define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew"
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#define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0
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#define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew"
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#define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0
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#endif
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#define CONFIG_ENV_IS_IN_MMC
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