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ARM: vf610: Add SoC and CPU type detection

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Vybrid product family consists of several rather similar SoC which
can be determined by softare during boot time. This allows use of
variable ${soc} for Linux device tree files. Detect VF5xx CPU's by
reading the CPU count register. We can determine the second number
of the CPU type (VF6x0) which indicates the presence of a L2 cache.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
This commit is contained in:
Sanchayan Maity 2015-04-15 16:24:24 +05:30 committed by Tom Rini
parent 8b4f9afac0
commit 1db503c4b9
2 changed files with 39 additions and 2 deletions
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29
arch/arm/cpu/armv7/vf610/generic.c
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@ -18,6 +18,8 @@
DECLARE_GLOBAL_DATA_PTR;
#endif
static char soc_type[] = "xx0";
#ifdef CONFIG_MXC_OCOTP
void enable_ocotp_clk(unsigned char enable)
{
@ -284,14 +286,37 @@ static char *get_reset_cause(void)
int print_cpuinfo(void)
{
printf("CPU: Freescale Vybrid VF610 at %d MHz\n",
mxc_get_clock(MXC_ARM_CLK) / 1000000);
printf("CPU: Freescale Vybrid VF%s at %d MHz\n",
soc_type, mxc_get_clock(MXC_ARM_CLK) / 1000000);
printf("Reset cause: %s\n", get_reset_cause());
return 0;
}
#endif
int arch_cpu_init(void)
{
struct mscm *mscm = (struct mscm *)MSCM_BASE_ADDR;
soc_type[0] = mscm->cpxcount ? '6' : '5'; /*Dual Core => VF6x0 */
soc_type[1] = mscm->cpxcfg1 ? '1' : '0'; /* L2 Cache => VFx10 */
return 0;
}
#ifdef CONFIG_ARCH_MISC_INIT
int arch_misc_init(void)
{
char soc[6];
strcat(soc, "vf");
strcat(soc, soc_type);
setenv("soc", soc);
return 0;
}
#endif
int cpu_eth_init(bd_t *bis)
{
int rc = -ENODEV;

12
arch/arm/include/asm/arch-vf610/imx-regs.h
View File

@ -457,6 +457,18 @@ struct scsc_reg {
u32 sosc_ctr;
};
/* MSCM */
struct mscm {
u32 cpxtype;
u32 cpxnum;
u32 cpxmaster;
u32 cpxcount;
u32 cpxcfg0;
u32 cpxcfg1;
u32 cpxcfg2;
u32 cpxcfg3;
};
#endif /* __ASSEMBLER__*/
#endif /* __ASM_ARCH_IMX_REGS_H__ */