x86: Misc PCI touchups
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
This commit is contained in:
parent
303418cc97
commit
1cfcf03701
@ -130,9 +130,7 @@ void pci_sc520_init(struct pci_controller *hose)
|
||||
hose->last_busno = 0xff;
|
||||
hose->region_count = pci_set_regions(hose);
|
||||
|
||||
pci_setup_type1(hose,
|
||||
SC520_REG_ADDR,
|
||||
SC520_REG_DATA);
|
||||
pci_setup_type1(hose);
|
||||
|
||||
pci_register_hose(hose);
|
||||
|
||||
|
@ -29,7 +29,7 @@
|
||||
#define DEFINE_PCI_DEVICE_TABLE(_table) \
|
||||
const struct pci_device_id _table[]
|
||||
|
||||
void pci_setup_type1(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data);
|
||||
void pci_setup_type1(struct pci_controller *hose);
|
||||
int pci_enable_legacy_video_ports(struct pci_controller* hose);
|
||||
int pci_shadow_rom(pci_dev_t dev, unsigned char *dest);
|
||||
void pci_remove_rom_window(struct pci_controller* hose, u32 addr);
|
||||
|
@ -50,7 +50,11 @@ TYPE1_PCI_OP(write, byte, u8, outb, 3)
|
||||
TYPE1_PCI_OP(write, word, u16, outw, 2)
|
||||
TYPE1_PCI_OP(write, dword, u32, outl, 0)
|
||||
|
||||
void pci_setup_type1(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data)
|
||||
/* bus mapping constants (used for PCI core initialization) */
|
||||
#define PCI_REG_ADDR 0x00000cf8
|
||||
#define PCI_REG_DATA 0x00000cfc
|
||||
|
||||
void pci_setup_type1(struct pci_controller *hose)
|
||||
{
|
||||
pci_set_ops(hose,
|
||||
type1_read_config_byte,
|
||||
@ -60,6 +64,6 @@ void pci_setup_type1(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data)
|
||||
type1_write_config_word,
|
||||
type1_write_config_dword);
|
||||
|
||||
hose->cfg_addr = (unsigned int *)cfg_addr;
|
||||
hose->cfg_data = (unsigned char *)cfg_data;
|
||||
hose->cfg_addr = (unsigned int *)PCI_REG_ADDR;
|
||||
hose->cfg_data = (unsigned char *)PCI_REG_DATA;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user