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Merge branch 'master' of git://git.denx.de/u-boot-socfpga

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- Arria10 DRAM fixes and Gen5 cache fixes
This commit is contained in:
Tom Rini
2019-03-10 10:16:07 -04:00
parent bdbf50f80c 88c3bb49e1
commit 19c8c9c103
6 changed files with 48 additions and 76 deletions
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2
include/configs/socfpga_arria10_socdk.h
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@@ -15,8 +15,6 @@
/*
* U-Boot general configurations
*/
/* Cache options */
#define CONFIG_SYS_DCACHE_OFF
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000

9
include/configs/socfpga_common.h
View File

@@ -275,13 +275,20 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
/* SPL QSPI boot support */
#ifdef CONFIG_SPL_SPI_SUPPORT
#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
#endif
#endif
/* SPL NAND boot support */
#ifdef CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x100000
#endif
#endif
/*