ARM: dts: stm32: Add DH Electronics DHCOM SoM and PDK2 board
Add support for DH Electronics DHCOM SoM and PDK2 rev. 400 carrier board. This is an SoM with STM32MP15xx and an evaluation kit. The baseboard provides Ethernet, UART, USB, CAN and optional display. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
This commit is contained in:
Marek Vasut
committed by
Patrick Delaunay
Patrick Delaunay
parent
721d6b594b
commit
199537309b
@@ -882,7 +882,8 @@ dtb-$(CONFIG_STM32MP15x) += \
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stm32mp157a-avenger96.dtb \
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stm32mp157c-dk2.dtb \
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stm32mp157c-ed1.dtb \
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stm32mp157c-ev1.dtb
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stm32mp157c-ev1.dtb \
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stm32mp15xx-dhcom-pdk2.dtb
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dtb-$(CONFIG_SOC_K3_AM6) += k3-am654-base-board.dtb k3-am654-r5-base-board.dtb
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dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
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6
arch/arm/dts/stm32mp15xx-dhcom-pdk2-u-boot.dtsi
Normal file
6
arch/arm/dts/stm32mp15xx-dhcom-pdk2-u-boot.dtsi
Normal file
@@ -0,0 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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/*
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* Copyright (C) 2019 Marek Vasut <marex@denx.de>
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*/
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#include "stm32mp15xx-dhcom-u-boot.dtsi"
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88
arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts
Normal file
88
arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts
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@@ -0,0 +1,88 @@
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// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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/*
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* Copyright (C) 2019 Marek Vasut <marex@denx.de>
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*/
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#include "stm32mp15xx-dhcom.dtsi"
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/ {
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model = "STMicroelectronics STM32MP15xx DHCOM Premium Developer Kit (2)";
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compatible = "dh,stm32mp15xx-dhcom-pdk2", "st,stm32mp15x";
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aliases {
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serial0 = &uart4;
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ethernet0 = ðernet0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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ethernet_vio: vioregulator {
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compatible = "regulator-fixed";
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regulator-name = "vio";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpiog 3 GPIO_ACTIVE_LOW>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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ðernet0 {
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status = "okay";
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pinctrl-0 = <ðernet0_rmii_pins_a>;
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pinctrl-1 = <ðernet0_rmii_pins_sleep_a>;
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pinctrl-names = "default", "sleep";
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phy-mode = "rmii";
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max-speed = <100>;
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phy-handle = <&phy0>;
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st,eth_ref_clk_sel;
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phy-reset-gpios = <&gpioh 15 GPIO_ACTIVE_LOW>;
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mdio0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy0: ethernet-phy@1 {
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reg = <1>;
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};
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};
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};
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&pinctrl {
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ethernet0_rmii_pins_a: rmii-0 {
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pins1 {
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pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
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<STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
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<STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
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<STM32_PINMUX('A', 1, AF0)>, /* ETH1_RMII_REF_CLK */
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<STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
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<STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
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bias-disable;
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drive-push-pull;
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slew-rate = <2>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
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<STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
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<STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
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bias-disable;
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};
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};
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ethernet0_rmii_pins_sleep_a: rmii-sleep-0 {
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pins1 {
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pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
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<STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
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<STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
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<STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
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<STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
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<STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
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<STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
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<STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
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<STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
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};
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};
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};
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238
arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
Normal file
238
arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
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@@ -0,0 +1,238 @@
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// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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/*
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* Copyright (C) 2019 Marek Vasut <marex@denx.de>
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*/
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#include <dt-bindings/clock/stm32mp1-clksrc.h>
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#include "stm32mp157-u-boot.dtsi"
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#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
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/ {
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aliases {
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i2c1 = &i2c2;
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i2c3 = &i2c4;
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i2c4 = &i2c5;
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mmc0 = &sdmmc1;
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mmc1 = &sdmmc2;
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spi0 = &qspi;
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usb0 = &usbotg_hs;
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};
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config {
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u-boot,boot-led = "heartbeat";
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u-boot,error-led = "error";
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st,fastboot-gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
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st,stm32prog-gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
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};
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led {
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red {
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label = "error";
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gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
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default-state = "off";
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status = "okay";
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};
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blue {
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default-state = "on";
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};
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};
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};
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&i2c4 {
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u-boot,dm-pre-reloc;
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};
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&i2c4_pins_a {
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u-boot,dm-pre-reloc;
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pins {
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u-boot,dm-pre-reloc;
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};
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};
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&pmic {
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u-boot,dm-pre-reloc;
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};
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&flash0 {
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u-boot,dm-spl;
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};
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&qspi {
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u-boot,dm-spl;
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};
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&qspi_clk_pins_a {
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u-boot,dm-spl;
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pins {
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u-boot,dm-spl;
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};
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};
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&qspi_bk1_pins_a {
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u-boot,dm-spl;
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pins1 {
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u-boot,dm-spl;
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};
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pins2 {
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u-boot,dm-spl;
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};
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};
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&qspi_bk2_pins_a {
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u-boot,dm-spl;
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pins1 {
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u-boot,dm-spl;
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};
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pins2 {
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u-boot,dm-spl;
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};
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};
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&rcc {
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st,clksrc = <
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CLK_MPU_PLL1P
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CLK_AXI_PLL2P
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CLK_MCU_PLL3P
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CLK_PLL12_HSE
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CLK_PLL3_HSE
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CLK_PLL4_HSE
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CLK_RTC_LSE
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CLK_MCO1_DISABLED
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CLK_MCO2_DISABLED
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>;
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st,clkdiv = <
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1 /*MPU*/
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0 /*AXI*/
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0 /*MCU*/
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1 /*APB1*/
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1 /*APB2*/
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1 /*APB3*/
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1 /*APB4*/
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2 /*APB5*/
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23 /*RTC*/
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0 /*MCO1*/
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0 /*MCO2*/
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>;
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st,pkcs = <
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CLK_CKPER_HSE
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CLK_FMC_ACLK
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CLK_QSPI_ACLK
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CLK_ETH_PLL4P
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CLK_SDMMC12_PLL4P
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CLK_DSI_DSIPLL
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CLK_STGEN_HSE
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CLK_USBPHY_HSE
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CLK_SPI2S1_PLL3Q
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CLK_SPI2S23_PLL3Q
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CLK_SPI45_HSI
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CLK_SPI6_HSI
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CLK_I2C46_HSI
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CLK_SDMMC3_PLL4P
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CLK_USBO_USBPHY
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CLK_ADC_CKPER
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CLK_CEC_LSE
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CLK_I2C12_HSI
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CLK_I2C35_HSI
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CLK_UART1_HSI
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CLK_UART24_HSI
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CLK_UART35_HSI
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CLK_UART6_HSI
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CLK_UART78_HSI
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CLK_SPDIF_PLL4P
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CLK_FDCAN_PLL4Q
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CLK_SAI1_PLL3Q
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CLK_SAI2_PLL3Q
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CLK_SAI3_PLL3Q
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CLK_SAI4_PLL3Q
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CLK_RNG1_LSI
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CLK_RNG2_LSI
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CLK_LPTIM1_PCLK1
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CLK_LPTIM23_PCLK3
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CLK_LPTIM45_LSE
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>;
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/* VCO = 1300.0 MHz => P = 650 (CPU) */
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pll1: st,pll@0 {
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cfg = < 2 80 0 0 0 PQR(1,0,0) >;
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frac = < 0x800 >;
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u-boot,dm-pre-reloc;
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};
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/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
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pll2: st,pll@1 {
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cfg = < 2 65 1 0 0 PQR(1,1,1) >;
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frac = < 0x1400 >;
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u-boot,dm-pre-reloc;
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};
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/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
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pll3: st,pll@2 {
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cfg = < 1 33 1 16 36 PQR(1,1,1) >;
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frac = < 0x1a04 >;
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u-boot,dm-pre-reloc;
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};
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/* VCO = 600.0 MHz => P = 50, Q = 50, R = 50 */
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pll4: st,pll@3 {
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cfg = < 1 49 11 11 11 PQR(1,1,1) >;
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u-boot,dm-pre-reloc;
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};
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};
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&sdmmc1 {
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u-boot,dm-spl;
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};
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&sdmmc1_b4_pins_a {
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u-boot,dm-spl;
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pins {
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u-boot,dm-spl;
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};
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};
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&sdmmc1_dir_pins_a {
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u-boot,dm-spl;
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pins1 {
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u-boot,dm-spl;
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};
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pins2 {
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u-boot,dm-spl;
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};
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};
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&sdmmc2 {
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u-boot,dm-spl;
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};
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&sdmmc2_b4_pins_a {
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u-boot,dm-spl;
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pins {
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u-boot,dm-spl;
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};
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};
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&sdmmc2_d47_pins_a {
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u-boot,dm-spl;
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pins {
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u-boot,dm-spl;
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};
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};
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&uart4 {
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u-boot,dm-pre-reloc;
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};
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&uart4_pins_a {
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u-boot,dm-pre-reloc;
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pins1 {
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u-boot,dm-pre-reloc;
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};
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pins2 {
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u-boot,dm-pre-reloc;
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/* pull-up on rx to avoid floating level */
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bias-pull-up;
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};
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};
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379
arch/arm/dts/stm32mp15xx-dhcom.dtsi
Normal file
379
arch/arm/dts/stm32mp15xx-dhcom.dtsi
Normal file
@@ -0,0 +1,379 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) 2019 Marek Vasut <marex@denx.de>
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*/
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/dts-v1/;
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#include "stm32mp157c.dtsi"
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#include "stm32mp157xaa-pinctrl.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/mfd/st,stpmic1.h>
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/ {
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memory@c0000000 {
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device_type = "memory";
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reg = <0xC0000000 0x40000000>;
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};
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};
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&cec {
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pinctrl-names = "default";
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pinctrl-0 = <&cec_pins_a>;
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status = "okay";
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};
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&dcmi {
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status = "okay";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&dcmi_pins_a>;
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pinctrl-1 = <&dcmi_sleep_pins_a>;
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};
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&dts {
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status = "okay";
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins_a>;
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i2c-scl-rising-time-ns = <185>;
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i2c-scl-falling-time-ns = <20>;
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status = "okay";
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};
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&i2c4 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4_pins_a>;
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i2c-scl-rising-time-ns = <185>;
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i2c-scl-falling-time-ns = <20>;
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status = "okay";
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/* spare dmas for other usage */
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/delete-property/dmas;
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/delete-property/dma-names;
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pmic: stpmic@33 {
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compatible = "st,stpmic1";
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reg = <0x33>;
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interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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status = "okay";
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regulators {
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compatible = "st,stpmic1-regulators";
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ldo1-supply = <&v3v3>;
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ldo2-supply = <&v3v3>;
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ldo3-supply = <&vdd_ddr>;
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ldo5-supply = <&v3v3>;
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ldo6-supply = <&v3v3>;
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pwr_sw1-supply = <&bst_out>;
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pwr_sw2-supply = <&bst_out>;
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vddcore: buck1 {
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regulator-name = "vddcore";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-initial-mode = <0>;
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regulator-over-current-protection;
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};
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vdd_ddr: buck2 {
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regulator-name = "vdd_ddr";
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-initial-mode = <0>;
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regulator-over-current-protection;
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};
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vdd: buck3 {
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regulator-name = "vdd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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st,mask-reset;
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regulator-initial-mode = <0>;
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regulator-over-current-protection;
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};
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v3v3: buck4 {
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regulator-name = "v3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-over-current-protection;
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regulator-initial-mode = <0>;
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};
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vdda: ldo1 {
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regulator-name = "vdda";
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regulator-min-microvolt = <2900000>;
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regulator-max-microvolt = <2900000>;
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interrupts = <IT_CURLIM_LDO1 0>;
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};
|
||||
|
||||
v2v8: ldo2 {
|
||||
regulator-name = "v2v8";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
interrupts = <IT_CURLIM_LDO2 0>;
|
||||
};
|
||||
|
||||
vtt_ddr: ldo3 {
|
||||
regulator-name = "vtt_ddr";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-always-on;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vdd_usb: ldo4 {
|
||||
regulator-name = "vdd_usb";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
interrupts = <IT_CURLIM_LDO4 0>;
|
||||
};
|
||||
|
||||
vdd_sd: ldo5 {
|
||||
regulator-name = "vdd_sd";
|
||||
regulator-min-microvolt = <2900000>;
|
||||
regulator-max-microvolt = <2900000>;
|
||||
interrupts = <IT_CURLIM_LDO5 0>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
v1v8: ldo6 {
|
||||
regulator-name = "v1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
interrupts = <IT_CURLIM_LDO6 0>;
|
||||
};
|
||||
|
||||
vref_ddr: vref_ddr {
|
||||
regulator-name = "vref_ddr";
|
||||
regulator-always-on;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
bst_out: boost {
|
||||
regulator-name = "bst_out";
|
||||
interrupts = <IT_OCP_BOOST 0>;
|
||||
};
|
||||
|
||||
vbus_otg: pwr_sw1 {
|
||||
regulator-name = "vbus_otg";
|
||||
interrupts = <IT_OCP_OTG 0>;
|
||||
};
|
||||
|
||||
vbus_sw: pwr_sw2 {
|
||||
regulator-name = "vbus_sw";
|
||||
interrupts = <IT_OCP_SWOUT 0>;
|
||||
regulator-active-discharge;
|
||||
};
|
||||
};
|
||||
|
||||
onkey {
|
||||
compatible = "st,stpmic1-onkey";
|
||||
interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
|
||||
interrupt-names = "onkey-falling", "onkey-rising";
|
||||
power-off-time-sec = <10>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog {
|
||||
compatible = "st,stpmic1-wdt";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c5_pins_a>;
|
||||
i2c-scl-rising-time-ns = <185>;
|
||||
i2c-scl-falling-time-ns = <20>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ipcc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iwdg2 {
|
||||
timeout-sec = <32>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&m4_rproc {
|
||||
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
|
||||
mbox-names = "vq0", "vq1", "shutdown";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwr {
|
||||
pwr-regulators {
|
||||
vdd-supply = <&vdd>;
|
||||
vdd_3v3_usbfs-supply = <&vdd_usb>;
|
||||
};
|
||||
};
|
||||
|
||||
&qspi {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a &qspi_bk2_pins_a>;
|
||||
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a &qspi_bk2_sleep_pins_a>;
|
||||
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
flash0: mx66l51235l@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-max-frequency = <108000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
flash1: mx66l51235l@1 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <1>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-max-frequency = <108000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&rng1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
pinctrl-names = "default", "opendrain", "sleep";
|
||||
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
|
||||
pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
|
||||
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
|
||||
broken-cd;
|
||||
st,sig-dir;
|
||||
st,neg-edge;
|
||||
st,use-ckin;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <&vdd_sd>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
|
||||
non-removable;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
st,sig-dir;
|
||||
st,neg-edge;
|
||||
bus-width = <8>;
|
||||
vmmc-supply = <&v3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins_a>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&timers2 {
|
||||
/* spare dmas for other usage (un-delete to enable pwm capture) */
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
status = "disabled";
|
||||
pwm {
|
||||
pinctrl-0 = <&pwm2_pins_a>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
timer@1 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&timers6 {
|
||||
status = "okay";
|
||||
/* spare dmas for other usage */
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
timer@5 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&timers8 {
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
status = "disabled";
|
||||
pwm {
|
||||
pinctrl-0 = <&pwm8_pins_a>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
timer@7 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&timers12 {
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
status = "disabled";
|
||||
pwm {
|
||||
pinctrl-0 = <&pwm12_pins_a>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
timer@11 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4_pins_a>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh_ehci {
|
||||
phys = <&usbphyc_port0>;
|
||||
phy-names = "usb";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg_hs {
|
||||
dr_mode = "peripheral";
|
||||
phys = <&usbphyc_port1 0>;
|
||||
phy-names = "usb2-phy";
|
||||
vbus-supply = <&vbus_otg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphyc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphyc_port0 {
|
||||
phy-supply = <&vdd_usb>;
|
||||
};
|
||||
|
||||
&usbphyc_port1 {
|
||||
phy-supply = <&vdd_usb>;
|
||||
};
|
||||
@@ -73,6 +73,14 @@ config TARGET_ST_STM32MP15x
|
||||
Evalulation board (EV1) or Discovery board (DK1 and DK2).
|
||||
The difference between board are managed with devicetree
|
||||
|
||||
config TARGET_DH_STM32MP1_PDK2
|
||||
bool "DH STM32MP1 PDK2"
|
||||
select STM32MP15x
|
||||
imply BOOTCOUNT_LIMIT
|
||||
imply CMD_BOOTCOUNT
|
||||
help
|
||||
Target the DH PDK2 development kit with STM32MP15x SoM.
|
||||
|
||||
endchoice
|
||||
|
||||
config STM32MP1_TRUSTED
|
||||
@@ -158,5 +166,6 @@ config DEBUG_UART_CLOCK
|
||||
endif
|
||||
|
||||
source "board/st/stm32mp1/Kconfig"
|
||||
source "board/dhelectronics/dh_stm32mp1/Kconfig"
|
||||
|
||||
endif
|
||||
|
||||
Reference in New Issue
Block a user