pci: Drop DM_PCI check from bios_emul

We don't need these checks anymore since when PCI is enabled, driver model
is always used.

Drop them.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2021-08-01 18:54:33 -06:00 committed by Tom Rini
parent eb4b7fa0ae
commit 199056d1a1
3 changed files with 0 additions and 153 deletions

View File

@ -230,19 +230,12 @@ This function executes the BIOS POST code on the controller. We assume that
at this stage the controller has its I/O and memory space enabled and
that all other controllers are in a disabled state.
****************************************************************************/
#ifdef CONFIG_DM_PCI
static void PCI_doBIOSPOST(struct udevice *pcidev, BE_VGAInfo *vga_info,
int vesa_mode, struct vbe_mode_info *mode_info)
#else
static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info,
int vesa_mode, struct vbe_mode_info *mode_info)
#endif
{
RMREGS regs;
RMSREGS sregs;
#ifdef CONFIG_DM_PCI
pci_dev_t bdf;
#endif
/* Determine the value to store in AX for BIOS POST. Per the PCI specs,
AH must contain the bus and AL must contain the devfn, encoded as
@ -250,14 +243,9 @@ static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info,
*/
memset(&regs, 0, sizeof(regs));
memset(&sregs, 0, sizeof(sregs));
#ifdef CONFIG_DM_PCI
bdf = dm_pci_get_bdf(pcidev);
regs.x.ax = (int)PCI_BUS(bdf) << 8 |
(int)PCI_DEV(bdf) << 3 | (int)PCI_FUNC(bdf);
#else
regs.x.ax = ((int)PCI_BUS(pcidev) << 8) |
((int)PCI_DEV(pcidev) << 3) | (int)PCI_FUNC(pcidev);
#endif
/*Setup the X86 emulator for the VGA BIOS*/
BE_setVGA(vga_info);
@ -300,28 +288,15 @@ NOTE: This function leaves the original memory aperture disabled by leaving
it programmed to all 1's. It must be restored to the correct value
later.
****************************************************************************/
#ifdef CONFIG_DM_PCI
static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar)
#else
static u32 PCI_findBIOSAddr(pci_dev_t pcidev, int *bar)
#endif
{
u32 base, size;
for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) {
#ifdef CONFIG_DM_PCI
dm_pci_read_config32(pcidev, *bar, &base);
#else
pci_read_config_dword(pcidev, *bar, &base);
#endif
if (!(base & 0x1)) {
#ifdef CONFIG_DM_PCI
dm_pci_write_config32(pcidev, *bar, 0xFFFFFFFF);
dm_pci_read_config32(pcidev, *bar, &size);
#else
pci_write_config_dword(pcidev, *bar, 0xFFFFFFFF);
pci_read_config_dword(pcidev, *bar, &size);
#endif
size = ~(size & ~0xFF) + 1;
if (size >= MAX_BIOSLEN)
return base & ~0xFF;
@ -344,19 +319,11 @@ necessary).
Anyway to fix this we change all I/O mapped base registers and
chop off the top bits.
****************************************************************************/
#ifdef CONFIG_DM_PCI
static void PCI_fixupIObase(struct udevice *pcidev, int reg, u32 *base)
#else
static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base)
#endif
{
if ((*base & 0x1) && (*base > 0xFFFE)) {
*base &= 0xFFFF;
#ifdef CONFIG_DM_PCI
dm_pci_write_config32(pcidev, reg, *base);
#else
pci_write_config_dword(pcidev, reg, *base);
#endif
}
}
@ -371,30 +338,18 @@ Pointers to the mapped BIOS image
REMARKS:
Maps a pointer to the BIOS image on the graphics card on the PCI bus.
****************************************************************************/
#ifdef CONFIG_DM_PCI
void *PCI_mapBIOSImage(struct udevice *pcidev)
#else
void *PCI_mapBIOSImage(pci_dev_t pcidev)
#endif
{
u32 BIOSImageBus;
int BIOSImageBAR;
u8 *BIOSImage;
/*Save PCI BAR registers that might get changed*/
#ifdef CONFIG_DM_PCI
dm_pci_read_config32(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
#else
pci_read_config_dword(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
#endif
/*Fix up I/O base registers to less than 64K */
if(saveBaseAddress14 != 0)
@ -413,21 +368,12 @@ void *PCI_mapBIOSImage(pci_dev_t pcidev)
return NULL;
}
#ifdef CONFIG_DM_PCI
BIOSImage = dm_pci_bus_to_virt(pcidev, BIOSImageBus,
PCI_REGION_MEM, 0, MAP_NOCACHE);
/*Change the PCI BAR registers to map it onto the bus.*/
dm_pci_write_config32(pcidev, BIOSImageBAR, 0);
dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
#else
BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus,
PCI_REGION_MEM, 0, MAP_NOCACHE);
/*Change the PCI BAR registers to map it onto the bus.*/
pci_write_config_dword(pcidev, BIOSImageBAR, 0);
pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
#endif
udelay(1);
/*Check that the BIOS image is valid. If not fail, or return the
@ -447,7 +393,6 @@ pcidev - PCI device info for the video card on the bus
REMARKS:
Unmaps the BIOS image for the device and restores framebuffer mappings
****************************************************************************/
#ifdef CONFIG_DM_PCI
void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage)
{
dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
@ -456,16 +401,6 @@ void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage)
dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
}
#else
void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage)
{
pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
}
#endif
/****************************************************************************
PARAMETERS:
@ -479,22 +414,14 @@ REMARKS:
Loads and POST's the display controllers BIOS, directly from the BIOS
image we can extract over the PCI bus.
****************************************************************************/
#ifdef CONFIG_DM_PCI
static int PCI_postController(struct udevice *pcidev, uchar *bios_rom,
int bios_len, BE_VGAInfo *vga_info,
int vesa_mode, struct vbe_mode_info *mode_info)
#else
static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
BE_VGAInfo *vga_info, int vesa_mode,
struct vbe_mode_info *mode_info)
#endif
{
u32 bios_image_len;
uchar *mapped_bios;
uchar *copy_of_bios;
#ifdef CONFIG_DM_PCI
pci_dev_t bdf;
#endif
if (bios_rom) {
copy_of_bios = bios_rom;
@ -522,16 +449,10 @@ static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
}
/*Save information in vga_info structure*/
#ifdef CONFIG_DM_PCI
bdf = dm_pci_get_bdf(pcidev);
vga_info->function = PCI_FUNC(bdf);
vga_info->device = PCI_DEV(bdf);
vga_info->bus = PCI_BUS(bdf);
#else
vga_info->function = PCI_FUNC(pcidev);
vga_info->device = PCI_DEV(pcidev);
vga_info->bus = PCI_BUS(pcidev);
#endif
vga_info->pcidev = pcidev;
vga_info->BIOSImage = copy_of_bios;
vga_info->BIOSImageLen = bios_image_len;
@ -549,22 +470,13 @@ static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
return true;
}
#ifdef CONFIG_DM_PCI
int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **vga_infop)
#else
int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **vga_infop)
#endif
{
BE_VGAInfo *VGAInfo;
#ifdef CONFIG_DM_PCI
pci_dev_t bdf = dm_pci_get_bdf(pcidev);
printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
PCI_BUS(bdf), PCI_FUNC(bdf), PCI_DEV(bdf));
#else
printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
PCI_BUS(pcidev), PCI_FUNC(pcidev), PCI_DEV(pcidev));
#endif
/*Initialise the x86 BIOS emulator*/
if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
printf("videoboot: Out of memory!\n");
@ -582,15 +494,9 @@ void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))
X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func);
}
#ifdef CONFIG_DM_PCI
int biosemu_run(struct udevice *pcidev, uchar *bios_rom, int bios_len,
BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
struct vbe_mode_info *mode_info)
#else
int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
struct vbe_mode_info *mode_info)
#endif
{
/*Post all the display controller BIOS'es*/
if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info,
@ -623,12 +529,8 @@ REMARKS:
Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
and the X86 BIOS emulator module.
****************************************************************************/
#ifdef CONFIG_DM_PCI
int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo,
int clean_up)
#else
int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up)
#endif
{
BE_VGAInfo *VGAInfo;
int ret;

View File

@ -185,21 +185,12 @@ static void X86API int1A(int unused)
case 0xB103: /* Find PCI class code */
M.x86.R_AH = DEVICE_NOT_FOUND;
#ifdef __KERNEL__
#ifdef CONFIG_DM_PCI
dm_pci_read_config8(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
&interface);
dm_pci_read_config8(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
&subclass);
dm_pci_read_config8(_BE_env.vgaInfo.pcidev,
PCI_CLASS_DEVICE + 1, &baseclass);
#else
pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
&interface);
pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
&subclass);
pci_read_config_byte(_BE_env.vgaInfo.pcidev,
PCI_CLASS_DEVICE + 1, &baseclass);
#endif
if (M.x86.R_CL == interface && M.x86.R_CH == subclass
&& (u8) (M.x86.R_ECX >> 16) == baseclass) {
#else
@ -218,13 +209,8 @@ static void X86API int1A(int unused)
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
#ifdef __KERNEL__
# ifdef CONFIG_DM_PCI
dm_pci_read_config8(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
&M.x86.R_CL);
# else
pci_read_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
&M.x86.R_CL);
# endif
#else
M.x86.R_CL =
(u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE,
@ -238,13 +224,8 @@ static void X86API int1A(int unused)
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
#ifdef __KERNEL__
# ifdef CONFIG_DM_PCI
dm_pci_read_config16(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
&M.x86.R_CX);
# else
pci_read_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
&M.x86.R_CX);
# endif
#else
M.x86.R_CX =
(u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD,
@ -258,13 +239,8 @@ static void X86API int1A(int unused)
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
#ifdef __KERNEL__
# ifdef CONFIG_DM_PCI
dm_pci_read_config32(_BE_env.vgaInfo.pcidev,
M.x86.R_DI, &M.x86.R_ECX);
# else
pci_read_config_dword(_BE_env.vgaInfo.pcidev,
M.x86.R_DI, &M.x86.R_ECX);
# endif
#else
M.x86.R_ECX =
(u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD,
@ -278,13 +254,8 @@ static void X86API int1A(int unused)
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
#ifdef __KERNEL__
# ifdef CONFIG_DM_PCI
dm_pci_write_config8(_BE_env.vgaInfo.pcidev,
M.x86.R_DI, M.x86.R_CL);
# else
pci_write_config_byte(_BE_env.vgaInfo.pcidev,
M.x86.R_DI, M.x86.R_CL);
# endif
#else
PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE,
_BE_env.vgaInfo.pciInfo);
@ -297,13 +268,8 @@ static void X86API int1A(int unused)
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
#ifdef __KERNEL__
# ifdef CONFIG_DM_PCI
dm_pci_write_config32(_BE_env.vgaInfo.pcidev,
M.x86.R_DI, M.x86.R_CX);
# else
pci_write_config_word(_BE_env.vgaInfo.pcidev,
M.x86.R_DI, M.x86.R_CX);
# endif
#else
PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD,
_BE_env.vgaInfo.pciInfo);
@ -316,13 +282,8 @@ static void X86API int1A(int unused)
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
#ifdef __KERNEL__
# ifdef CONFIG_DM_PCI
dm_pci_write_config32(_BE_env.vgaInfo.pcidev,
M.x86.R_DI, M.x86.R_ECX);
# else
pci_write_config_dword(_BE_env.vgaInfo.pcidev,
M.x86.R_DI, M.x86.R_ECX);
# endif
#else
PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD,
_BE_env.vgaInfo.pciInfo);

View File

@ -30,11 +30,7 @@ typedef struct {
int bus;
u32 VendorID;
u32 DeviceID;
#ifdef CONFIG_DM_PCI
struct udevice *pcidev;
#else
pci_dev_t pcidev;
#endif
void *BIOSImage;
u32 BIOSImageLen;
u8 LowMem[1536];
@ -42,12 +38,8 @@ typedef struct {
struct vbe_mode_info;
#ifdef CONFIG_DM_PCI
int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo,
int clean_up);
#else
int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up);
#endif
/* Run a BIOS ROM natively (only supported on x86 machines) */
void bios_run_on_x86(struct udevice *dev, unsigned long addr, int vesa_mode,
@ -65,18 +57,10 @@ void bios_set_interrupt_handler(int intnum, int (*int_handler_func)(void));
void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void));
#ifdef CONFIG_DM_PCI
int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **pVGAInfo);
int biosemu_run(struct udevice *dev, uchar *bios_rom, int bios_len,
BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
struct vbe_mode_info *mode_info);
#else
int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo);
int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
struct vbe_mode_info *mode_info);
#endif
#endif