Tegra30: MMC: Add SD bus power-rail and SDMMC pad init routines
T30 requires specific SDMMC pad programming, and bus power-rail bringup. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
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@ -25,6 +25,10 @@
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#include <asm/arch/pinmux.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/gp_padctrl.h>
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#include <asm/arch/gp_padctrl.h>
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#include "pinmux-config-cardhu.h"
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#include "pinmux-config-cardhu.h"
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#include <i2c.h>
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#define PMU_I2C_ADDRESS 0x2D
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#define MAX_I2C_RETRY 3
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/*
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/*
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* Routine: pinmux_init
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* Routine: pinmux_init
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@ -41,3 +45,50 @@ void pinmux_init(void)
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/* Initialize any non-default pad configs (APB_MISC_GP regs) */
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/* Initialize any non-default pad configs (APB_MISC_GP regs) */
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padgrp_config_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));
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padgrp_config_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));
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}
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}
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#if defined(CONFIG_TEGRA_MMC)
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/*
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* Do I2C/PMU writes to bring up SD card bus power
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*
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*/
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void board_sdmmc_voltage_init(void)
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{
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uchar reg, data_buffer[1];
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int i;
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i2c_set_bus_num(0); /* PMU is on bus 0 */
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/* TPS659110: LDO5_REG = 3.3v, ACTIVE to SDMMC1 */
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data_buffer[0] = 0x65;
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reg = 0x32;
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for (i = 0; i < MAX_I2C_RETRY; ++i) {
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if (i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1))
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udelay(100);
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}
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/* TPS659110: GPIO7_REG = PDEN, output a 1 to EN_3V3_SYS */
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data_buffer[0] = 0x09;
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reg = 0x67;
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for (i = 0; i < MAX_I2C_RETRY; ++i) {
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if (i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1))
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udelay(100);
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}
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}
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/*
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* Routine: pin_mux_mmc
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* Description: setup the MMC muxes, power rails, etc.
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*/
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void pin_mux_mmc(void)
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{
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/*
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* NOTE: We don't do mmc-specific pin muxes here.
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* They were done globally in pinmux_init().
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*/
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/* Bring up the SDIO1 power rail */
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board_sdmmc_voltage_init();
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}
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#endif /* MMC */
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@ -49,6 +49,7 @@
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#include <asm/arch-tegra/usb.h>
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#include <asm/arch-tegra/usb.h>
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#endif
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#endif
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#ifdef CONFIG_TEGRA_MMC
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#ifdef CONFIG_TEGRA_MMC
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#include <asm/arch-tegra/tegra_mmc.h>
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#include <asm/arch-tegra/mmc.h>
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#include <asm/arch-tegra/mmc.h>
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#endif
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#endif
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#include <i2c.h>
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#include <i2c.h>
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@ -245,4 +246,32 @@ int board_mmc_init(bd_t *bd)
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return 0;
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return 0;
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}
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}
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#endif
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void pad_init_mmc(struct mmc_host *host)
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{
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#if defined(CONFIG_TEGRA30)
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enum periph_id id = host->mmc_id;
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u32 val;
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debug("%s: sdmmc address = %08x, id = %d\n", __func__,
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(unsigned int)host->reg, id);
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/* Set the pad drive strength for SDMMC1 or 3 only */
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if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
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debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
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__func__);
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return;
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}
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val = readl(&host->reg->sdmemcmppadctl);
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val &= 0xFFFFFFF0;
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val |= MEMCOMP_PADCTRL_VREF;
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writel(val, &host->reg->sdmemcmppadctl);
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val = readl(&host->reg->autocalcfg);
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val &= 0xFFFF0000;
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val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
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writel(val, &host->reg->autocalcfg);
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#endif /* T30 */
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}
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#endif /* MMC */
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