Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

fsl-qoriq: Fixes related to env, spi, usb, crypto, configs, distro-boot
for Layerscape Boards like lx2, sl28, ls2088ardb.
powerpc: Fixes for t208xrdb revd board and cortina related configs
update for T208xRDB, T4240RDB.

board/freescale/common/fsl_validate.c

@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2015 Freescale Semiconductor, Inc.
+ * Copyright 2021 NXP
  */
 
 #include <common.h>
@@ -498,8 +499,11 @@ static int calc_img_key_hash(struct fsl_secboot_img_priv *img)
 		return ret;
 
 	ret = algo->hash_init(algo, &ctx);
-	if (ret)
+	if (ret) {
+		if (ctx)
+			free(ctx);
 		return ret;
+	}
 
 	/* Update hash for ESBC key */
 #ifdef CONFIG_KEY_REVOCATION
@@ -518,8 +522,11 @@ static int calc_img_key_hash(struct fsl_secboot_img_priv *img)
 
 	/* Copy hash at destination buffer */
 	ret = algo->hash_finish(algo, ctx, hash_val, algo->digest_size);
-	if (ret)
+	if (ret) {
+		if (ctx)
+			free(ctx);
 		return ret;
+	}
 
 	for (i = 0; i < SHA256_BYTES; i++)
 		img->img_key_hash[i] = hash_val[i];
@@ -547,14 +554,18 @@ static int calc_esbchdr_esbc_hash(struct fsl_secboot_img_priv *img)
 
 	ret = algo->hash_init(algo, &ctx);
 	/* Copy hash at destination buffer */
-	if (ret)
+	if (ret) {
+		free(ctx);
 		return ret;
+	}
 
 	/* Update hash for CSF Header */
 	ret = algo->hash_update(algo, ctx,
 		(u8 *)&img->hdr, sizeof(struct fsl_secboot_img_hdr), 0);
-	if (ret)
+	if (ret) {
+		free(ctx);
 		return ret;
+	}
 
 	/* Update the hash with that of srk table if srk flag is 1
 	 * If IE Table is selected, key is not added in the hash
@@ -581,22 +592,29 @@ static int calc_esbchdr_esbc_hash(struct fsl_secboot_img_priv *img)
 		key_hash = 1;
 	}
 #endif
-	if (ret)
+	if (ret) {
+		free(ctx);
 		return ret;
-	if (!key_hash)
+	}
+	if (!key_hash) {
+		free(ctx);
 		return ERROR_KEY_TABLE_NOT_FOUND;
+	}
 
 	/* Update hash for actual Image */
 	ret = algo->hash_update(algo, ctx,
 		(u8 *)(*(img->img_addr_ptr)), img->img_size, 1);
-	if (ret)
+	if (ret) {
+		free(ctx);
 		return ret;
+	}
 
 	/* Copy hash at destination buffer */
 	ret = algo->hash_finish(algo, ctx, hash_val, algo->digest_size);
-	if (ret)
+	if (ret) {
+		free(ctx);
 		return ret;
-
+	}
 	return 0;
 }
 

board/freescale/ls2080ardb/ls2080ardb.c

@@ -33,6 +33,9 @@
 #endif
 #include "../common/vid.h"
 
+#define CORTINA_FW_ADDR_IFCNOR			0x580980000
+#define CORTINA_FW_ADDR_IFCNOR_ALTBANK	0x584980000
+#define CORTINA_FW_ADDR_QSPI			0x980000
 #define PIN_MUX_SEL_SDHC	0x00
 #define PIN_MUX_SEL_DSPI	0x0a
 
@@ -235,6 +238,41 @@ int config_board_mux(int ctrl_type)
 	return 0;
 }
 
+ulong *cs4340_get_fw_addr(void)
+{
+#ifdef CONFIG_TFABOOT
+	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+	u32 svr = gur_in32(&gur->svr);
+#endif
+	ulong cortina_fw_addr = CONFIG_CORTINA_FW_ADDR;
+
+#ifdef CONFIG_TFABOOT
+	/* LS2088A TFA boot */
+	if (SVR_SOC_VER(svr) == SVR_LS2088A) {
+		enum boot_src src = get_boot_src();
+		u8 sw;
+
+		switch (src) {
+		case BOOT_SOURCE_IFC_NOR:
+			sw = QIXIS_READ(brdcfg[0]);
+			sw = (sw & 0x0f);
+			if (sw == 0)
+				cortina_fw_addr = CORTINA_FW_ADDR_IFCNOR;
+			else if (sw == 4)
+				cortina_fw_addr = CORTINA_FW_ADDR_IFCNOR_ALTBANK;
+			break;
+		case BOOT_SOURCE_QSPI_NOR:
+			/* Only one bank in QSPI */
+			cortina_fw_addr = CORTINA_FW_ADDR_QSPI;
+			break;
+		default:
+			printf("WARNING: Boot source not found\n");
+		}
+	}
+#endif
+	return (ulong *)cortina_fw_addr;
+}
+
 int board_init(void)
 {
 #ifdef CONFIG_FSL_MC_ENET

board/freescale/t208xrdb/cpld.h

@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor
+ * Copyright 2021 NXP
  */
 
 /*
@@ -42,3 +43,6 @@ void cpld_write(unsigned int reg, u8 value);
 
 /* RSTCON Register */
 #define CPLD_RSTCON_EDC_RST	0x04
+
+/* MISCCSR Register */
+#define CPLD_MISC_POR_EN	0x30

board/freescale/t208xrdb/t208xrdb.c

@@ -128,6 +128,13 @@ int misc_init_r(void)
 	reg |= CPLD_RSTCON_EDC_RST;
 	CPLD_WRITE(reset_ctl, reg);
 
+	/* Enable POR for boards revisions D and up */
+	if (get_hw_revision() >= 'D') {
+		reg = CPLD_READ(misc_csr);
+		reg |= CPLD_MISC_POR_EN;
+		CPLD_WRITE(misc_csr, reg);
+	}
+
 	return 0;
 }
 
@@ -158,3 +165,23 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 
 	return 0;
 }
+
+ulong *cs4340_get_fw_addr(void)
+{
+	ulong cortina_fw_addr = CONFIG_CORTINA_FW_ADDR;
+
+#ifdef CONFIG_SYS_CORTINA_FW_IN_NOR
+	u8 reg;
+
+	reg = CPLD_READ(flash_csr);
+	if (!(reg & CPLD_BOOT_SEL)) {
+		reg = ((reg & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT);
+		if (reg == 0)
+			cortina_fw_addr = CORTINA_FW_ADDR_IFCNOR;
+		else if (reg == 4)
+			cortina_fw_addr = CORTINA_FW_ADDR_IFCNOR_ALTBANK;
+	}
+#endif
+
+	return (ulong *)cortina_fw_addr;
+}

board/freescale/t208xrdb/t208xrdb.h

@@ -7,6 +7,9 @@
 #ifndef __CORENET_DS_H__
 #define __CORENET_DS_H__
 
+#define CORTINA_FW_ADDR_IFCNOR				0xefe00000
+#define CORTINA_FW_ADDR_IFCNOR_ALTBANK		0xebe00000
+
 void fdt_fixup_board_enet(void *blob);
 void pci_of_setup(void *blob, struct bd_info *bd);
 void fdt_fixup_board_fman_ethernet(void *blob);

board/freescale/t4rdb/t4240rdb.c

@@ -151,3 +151,22 @@ void board_detail(void)
 		break;
 	}
 }
+
+ulong *cs4340_get_fw_addr(void)
+{
+	ulong cortina_fw_addr = CONFIG_CORTINA_FW_ADDR;
+
+#ifdef CONFIG_SYS_CORTINA_FW_IN_NOR
+	u8 sw;
+
+	sw = CPLD_READ(vbank);
+	sw = sw & CPLD_BANK_SEL_MASK;
+
+	if (sw == 0)
+		cortina_fw_addr = CORTINA_FW_ADDR_IFCNOR;
+	else if (sw == 4)
+		cortina_fw_addr = CORTINA_FW_ADDR_IFCNOR_ALTBANK;
+#endif
+
+	return (ulong *)cortina_fw_addr;
+}

board/freescale/t4rdb/t4rdb.h

@@ -11,6 +11,9 @@
 #define CONFIG_SYS_NUM_FM1_DTSEC	4
 #define CONFIG_SYS_NUM_FM2_DTSEC	4
 
+#define CORTINA_FW_ADDR_IFCNOR				0xefe00000
+#define CORTINA_FW_ADDR_IFCNOR_ALTBANK		0xebf00000
+
 void fdt_fixup_board_enet(void *blob);
 void pci_of_setup(void *blob, struct bd_info *bd);