rockchip: Add basic support for firefly-rk3288
The Firefly RK3288 is a suitable target board for initial mainline Rockchip support. It includes a good set of peripherals, a recent SoC and it is readily available. This adds only some basic files required to allow the baord to display a serial message in SPL and hang. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass
parent
1b2fd5bf4e
commit
17aa548ced
@ -15,6 +15,8 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
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exynos5420-peach-pit.dtb \
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exynos5800-peach-pi.dtb \
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exynos5422-odroidxu3.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rk3288-firefly.dtb
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dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
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tegra20-medcom-wide.dtb \
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tegra20-paz00.dtb \
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75
arch/arm/dts/rk3288-firefly.dts
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75
arch/arm/dts/rk3288-firefly.dts
Normal file
@ -0,0 +1,75 @@
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/*
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* Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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/dts-v1/;
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#include "rk3288-firefly.dtsi"
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/ {
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model = "Firefly-RK3288";
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compatible = "firefly,firefly-rk3288", "rockchip,rk3288";
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chosen {
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stdout-path = &uart2;
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};
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config {
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u-boot,dm-pre-reloc;
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u-boot,boot-led = "firefly:green:power";
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};
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};
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&dmc {
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rockchip,num-channels = <2>;
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rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
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0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
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0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
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0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
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0x5 0x0>;
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rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
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0xa60 0x40 0x10 0x0>;
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rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xf 0xf>;
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rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
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};
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&ir {
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gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
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};
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&pinctrl {
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u-boot,dm-pre-reloc;
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act8846 {
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pmic_vsel: pmic-vsel {
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rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>;
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};
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};
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ir {
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ir_int: ir-int {
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rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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&pwm1 {
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status = "okay";
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};
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&uart2 {
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u-boot,dm-pre-reloc;
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reg-shift = <2>;
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};
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&sdmmc {
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u-boot,dm-pre-reloc;
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};
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&gpio3 {
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u-boot,dm-pre-reloc;
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};
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&gpio8 {
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u-boot,dm-pre-reloc;
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};
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457
arch/arm/dts/rk3288-firefly.dtsi
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457
arch/arm/dts/rk3288-firefly.dtsi
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@ -0,0 +1,457 @@
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/*
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* Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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#include "rk3288.dtsi"
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/ {
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memory {
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reg = <0 0x80000000>;
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};
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ext_gmac: external-gmac-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <125000000>;
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clock-output-names = "ext_gmac";
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};
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ir: ir-receiver {
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compatible = "gpio-ir-receiver";
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pinctrl-names = "default";
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pinctrl-0 = <&ir_int>;
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};
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keys: gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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button@0 {
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gpio-key,wakeup = <1>;
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gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
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label = "GPIO Power";
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linux,code = <116>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwr_key>;
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};
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};
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leds {
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u-boot,dm-pre-reloc;
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compatible = "gpio-leds";
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work {
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u-boot,dm-pre-reloc;
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gpios = <&gpio8 1 GPIO_ACTIVE_LOW>;
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label = "firefly:blue:user";
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linux,default-trigger = "rc-feedback";
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pinctrl-names = "default";
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pinctrl-0 = <&work_led>;
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};
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power {
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u-boot,dm-pre-reloc;
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gpios = <&gpio8 2 GPIO_ACTIVE_LOW>;
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label = "firefly:green:power";
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linux,default-trigger = "default-on";
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pinctrl-names = "default";
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pinctrl-0 = <&power_led>;
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};
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};
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vcc_sys: vsys-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc_sys";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc_sd: sdmmc-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_pwr>;
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regulator-name = "vcc_sd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <100000>;
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vin-supply = <&vcc_io>;
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};
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vcc_flash: flash-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc_flash";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc_io>;
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};
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vcc_5v: usb-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc_5v";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vcc_sys>;
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};
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vcc_host_5v: usb-host-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&host_vbus_drv>;
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regulator-name = "vcc_host_5v";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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vin-supply = <&vcc_5v>;
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};
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vcc_otg_5v: usb-otg-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&otg_vbus_drv>;
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regulator-name = "vcc_otg_5v";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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vin-supply = <&vcc_5v>;
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};
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};
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&cpu0 {
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cpu0-supply = <&vdd_cpu>;
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};
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&emmc {
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broken-cd;
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bus-width = <8>;
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cap-mmc-highspeed;
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disable-wp;
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non-removable;
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num-slots = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
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vmmc-supply = <&vcc_io>;
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vqmmc-supply = <&vcc_flash>;
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status = "okay";
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};
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&hdmi {
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ddc-i2c-bus = <&i2c5>;
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status = "okay";
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};
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&i2c0 {
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clock-frequency = <400000>;
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status = "okay";
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vdd_cpu: syr827@40 {
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compatible = "silergy,syr827";
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fcs,suspend-voltage-selector = <1>;
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reg = <0x40>;
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regulator-name = "vdd_cpu";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vcc_sys>;
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};
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vdd_gpu: syr828@41 {
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compatible = "silergy,syr828";
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fcs,suspend-voltage-selector = <1>;
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reg = <0x41>;
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regulator-name = "vdd_gpu";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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vin-supply = <&vcc_sys>;
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};
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hym8563: hym8563@51 {
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compatible = "haoyu,hym8563";
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reg = <0x51>;
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-output-names = "xin32k";
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interrupt-parent = <&gpio7>;
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interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-names = "default";
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pinctrl-0 = <&rtc_int>;
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};
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act8846: act8846@5a {
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compatible = "active-semi,act8846";
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reg = <0x5a>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_vsel>, <&pwr_hold>;
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system-power-controller;
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regulators {
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vcc_ddr: REG1 {
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regulator-name = "vcc_ddr";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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vcc_io: REG2 {
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regulator-name = "vcc_io";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vdd_log: REG3 {
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regulator-name = "vdd_log";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-always-on;
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};
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vcc_20: REG4 {
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regulator-name = "vcc_20";
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regulator-min-microvolt = <2000000>;
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regulator-max-microvolt = <2000000>;
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regulator-always-on;
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};
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vccio_sd: REG5 {
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regulator-name = "vccio_sd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vdd10_lcd: REG6 {
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regulator-name = "vdd10_lcd";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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vcca_18: REG7 {
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regulator-name = "vcca_18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vcca_33: REG8 {
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regulator-name = "vcca_33";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vcc_lan: REG9 {
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regulator-name = "vcc_lan";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vdd_10: REG10 {
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regulator-name = "vdd_10";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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vcc_18: REG11 {
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regulator-name = "vcc_18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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vcc18_lcd: REG12 {
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regulator-name = "vcc18_lcd";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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};
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};
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};
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&i2c1 {
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status = "okay";
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};
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&i2c2 {
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status = "okay";
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};
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&i2c4 {
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status = "okay";
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};
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&i2c5 {
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status = "okay";
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};
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&pinctrl {
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pcfg_output_high: pcfg-output-high {
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output-high;
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};
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pcfg_output_low: pcfg-output-low {
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output-low;
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};
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act8846 {
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pwr_hold: pwr-hold {
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rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
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};
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};
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gmac {
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phy_int: phy-int {
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rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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phy_pmeb: phy-pmeb {
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rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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phy_rst: phy-rst {
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rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
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};
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};
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hym8563 {
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rtc_int: rtc-int {
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rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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keys {
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pwr_key: pwr-key {
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rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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leds {
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power_led: power-led {
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rockchip,pins = <8 2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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work_led: work-led {
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rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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sdmmc {
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sdmmc_pwr: sdmmc-pwr {
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rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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usb_host {
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host_vbus_drv: host-vbus-drv {
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rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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usbhub_rst: usbhub-rst {
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rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_output_high>;
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};
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};
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usb_otg {
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otg_vbus_drv: otg-vbus-drv {
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rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&saradc {
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vref-supply = <&vcc_18>;
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status = "okay";
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};
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&sdio0 {
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broken-cd;
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bus-width = <4>;
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disable-wp;
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non-removable;
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num-slots = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>;
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vmmc-supply = <&vcc_18>;
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status = "okay";
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};
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&sdmmc {
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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card-detect-delay = <200>;
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disable-wp;
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num-slots = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
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vmmc-supply = <&vcc_sd>;
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status = "okay";
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};
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&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_clk>, <&spi0_cs0>, <&spi0_tx>, <&spi0_rx>, <&spi0_cs1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usbhub_rst>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_otg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vopb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vopb_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vopl {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vopl_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdt {
|
||||
status = "okay";
|
||||
};
|
||||
@ -1,6 +1,16 @@
|
||||
if ROCKCHIP_RK3288
|
||||
|
||||
config TARGET_FIREFLY_RK3288
|
||||
bool "Firefly-RK3288"
|
||||
help
|
||||
Firefly is a RK3288-based development board with 2 USB ports,
|
||||
HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet, It
|
||||
also includes on-board eMMC and 1GB of SDRAM. Expansion connectors
|
||||
provide access to display pins, I2C, SPI, UART and GPIOs.
|
||||
|
||||
config SYS_SOC
|
||||
default "rockchip"
|
||||
|
||||
source "board/firefly/firefly-rk3288/Kconfig"
|
||||
|
||||
endif
|
||||
|
||||
15
board/firefly/firefly-rk3288/Kconfig
Normal file
15
board/firefly/firefly-rk3288/Kconfig
Normal file
@ -0,0 +1,15 @@
|
||||
if TARGET_FIREFLY_RK3288
|
||||
|
||||
config SYS_BOARD
|
||||
default "firefly-rk3288"
|
||||
|
||||
config SYS_VENDOR
|
||||
default "firefly"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "firefly-rk3288"
|
||||
|
||||
config BOARD_SPECIFIC_OPTIONS # dummy
|
||||
def_bool y
|
||||
|
||||
endif
|
||||
6
board/firefly/firefly-rk3288/MAINTAINERS
Normal file
6
board/firefly/firefly-rk3288/MAINTAINERS
Normal file
@ -0,0 +1,6 @@
|
||||
FIREFLY
|
||||
M: Simon Glass <sjg@chromium.org>
|
||||
S: Maintained
|
||||
F: board/firefly/firefly-rk3288
|
||||
F: include/configs/firefly-rk3288.h
|
||||
F: configs/firefly-rk3288_defconfig
|
||||
7
board/firefly/firefly-rk3288/Makefile
Normal file
7
board/firefly/firefly-rk3288/Makefile
Normal file
@ -0,0 +1,7 @@
|
||||
#
|
||||
# (C) Copyright 2015 Google, Inc
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y += firefly-rk3288.o
|
||||
7
board/firefly/firefly-rk3288/firefly-rk3288.c
Normal file
7
board/firefly/firefly-rk3288/firefly-rk3288.c
Normal file
@ -0,0 +1,7 @@
|
||||
/*
|
||||
* (C) Copyright 2015 Google, Inc
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
43
configs/firefly-rk3288_defconfig
Normal file
43
configs/firefly-rk3288_defconfig
Normal file
@ -0,0 +1,43 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_ROCKCHIP_RK3288=y
|
||||
CONFIG_TARGET_FIREFLY_RK3288=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SPL_STACK_R_ADDR=0x80000
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_PMIC=y
|
||||
CONFIG_CMD_REGULATOR=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_RESET=y
|
||||
CONFIG_LED=y
|
||||
CONFIG_SPL_LED=y
|
||||
CONFIG_LED_GPIO=y
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_DEBUG_UART_BASE=0xff690000
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
# CONFIG_PINCTRL_FULL is not set
|
||||
# CONFIG_SPL_PINCTRL_FULL is not set
|
||||
CONFIG_ROCKCHIP_PINCTRL=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_PMIC_ACT8846=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_REGULATOR_ACT8846=y
|
||||
CONFIG_RAM=y
|
||||
CONFIG_SPL_RAM=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_ROCKCHIP_DWMMC=y
|
||||
CONFIG_USE_PRIVATE_LIBGCC=y
|
||||
CONFIG_CMD_DHRYSTONE=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
14
include/configs/firefly-rk3288.h
Normal file
14
include/configs/firefly-rk3288.h
Normal file
@ -0,0 +1,14 @@
|
||||
/*
|
||||
* (C) Copyright 2015 Google, Inc
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#include <configs/rk3288_common.h>
|
||||
|
||||
#define CONFIG_SPL_MMC_SUPPORT
|
||||
|
||||
#endif
|
||||
97
include/configs/rk3288_common.h
Normal file
97
include/configs/rk3288_common.h
Normal file
@ -0,0 +1,97 @@
|
||||
/*
|
||||
* (C) Copyright 2015 Google, Inc
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_RK3288_COMMON_H
|
||||
#define __CONFIG_RK3288_COMMON_H
|
||||
|
||||
#include <asm/arch/hardware.h>
|
||||
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define CONFIG_ENV_IS_NOWHERE
|
||||
#define CONFIG_ENV_SIZE 0x2000
|
||||
#define CONFIG_SYS_GENERIC_BOARD
|
||||
#define CONFIG_SYS_MAXARGS 16
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
#define CONFIG_SYS_MALLOC_LEN (32 << 20)
|
||||
#define CONFIG_SYS_CBSIZE 1024
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_SYS_THUMB_BUILD
|
||||
#define CONFIG_OF_LIBFDT
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
|
||||
#define CONFIG_SYS_TIMER_COUNTER (TIMER7_BASE + 8)
|
||||
|
||||
#define CONFIG_SPL_FRAMEWORK
|
||||
#define CONFIG_SPL_LIBCOMMON_SUPPORT
|
||||
#define CONFIG_SPL_LIBGENERIC_SUPPORT
|
||||
#define CONFIG_SPL_SERIAL_SUPPORT
|
||||
#define CONFIG_SYS_NS16550
|
||||
#define CONFIG_SYS_NS16550_MEM32
|
||||
#define CONFIG_SPL_BOARD_INIT
|
||||
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#define CONFIG_SYS_MALLOC_SIMPLE
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0x00100000
|
||||
#define CONFIG_SYS_INIT_SP_ADDR 0x00100000
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x00800800
|
||||
#define CONFIG_SPL_STACK 0xff718000
|
||||
#define CONFIG_SPL_TEXT_BASE 0xff704004
|
||||
|
||||
/* MMC/SD IP block */
|
||||
#define CONFIG_MMC
|
||||
#define CONFIG_GENERIC_MMC
|
||||
#define CONFIG_CMD_MMC
|
||||
#define CONFIG_SDHCI
|
||||
#define CONFIG_DWMMC
|
||||
#define CONFIG_BOUNCE_BUFFER
|
||||
|
||||
#define CONFIG_DOS_PARTITION
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_FAT_WRITE
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_CMD_EXT4
|
||||
#define CONFIG_CMD_FS_GENERIC
|
||||
#define CONFIG_PARTITION_UUIDS
|
||||
#define CONFIG_CMD_PART
|
||||
|
||||
/* RAW SD card / eMMC locations. */
|
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
|
||||
#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
|
||||
|
||||
/* FAT sd card locations. */
|
||||
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
|
||||
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
|
||||
|
||||
#define CONFIG_SPL_PINCTRL_SUPPORT
|
||||
#define CONFIG_SPL_GPIO_SUPPORT
|
||||
#define CONFIG_SPL_RAM_SUPPORT
|
||||
#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
|
||||
|
||||
#define CONFIG_CMD_CACHE
|
||||
#define CONFIG_CMD_TIME
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE 0
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define SDRAM_BANK_SIZE (2UL << 30)
|
||||
|
||||
#define CONFIG_SPI_FLASH
|
||||
#define CONFIG_SPI
|
||||
#define CONFIG_CMD_SF
|
||||
#define CONFIG_CMD_SPI
|
||||
#define CONFIG_SPI_FLASH_GIGADEVICE
|
||||
#define CONFIG_SF_DEFAULT_SPEED 20000000
|
||||
|
||||
#define CONFIG_CMD_I2C
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#include <config_distro_defaults.h>
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user