Merge tag 'fsl-qoriq-2022-9-6' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Reset fixes for p1_p2_rdb_pc Fix use after free issue fix in fsl_enetc.c Fix for fsl ddr: make bank_addr_bits reflect actual bits sl28 board update
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@@ -67,11 +67,24 @@ void spl_board_init(void)
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#endif
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}
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void tzpc_init(void)
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{
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/*
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* Mark the whole OCRAM as non-secure, otherwise DMA devices cannot
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* access it. This is for example necessary for MMC boot.
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*/
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#ifdef TZPCR0SIZE_BASE
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out_le32(TZPCR0SIZE_BASE, 0);
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#endif
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}
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void board_init_f(ulong dummy)
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{
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int ret;
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icache_enable();
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tzpc_init();
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/* Clear global data */
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memset((void *)gd, 0, sizeof(gd_t));
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if (IS_ENABLED(CONFIG_DEBUG_UART))
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@@ -44,7 +44,9 @@ __board_reset(void)
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{
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/* Do nothing */
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}
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void board_reset_prepare(void) __attribute__((weak, alias("__board_reset")));
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void board_reset(void) __attribute__((weak, alias("__board_reset")));
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void board_reset_last(void) __attribute__((weak, alias("__board_reset")));
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int checkcpu (void)
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{
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@@ -319,12 +321,18 @@ int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
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#else
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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/* Call board-specific preparation for reset */
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board_reset_prepare();
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/* Attempt board-specific reset */
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board_reset();
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/* Next try asserting HRESET_REQ */
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out_be32(&gur->rstcr, 0x2);
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udelay(100);
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/* Attempt last-stage board-specific reset */
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board_reset_last();
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#endif
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return 1;
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