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riscv: Clean up initialization in Andes PLIC

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This merges the PLIC initialization code from two functions into one.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
This commit is contained in:
Sean Anderson
2020-09-28 10:52:25 -04:00
committed by Andes
parent e86463f8e3
commit 15943bb558
1 changed files with 25 additions and 33 deletions
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58
arch/riscv/lib/andes_plic.c
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@@ -41,53 +41,45 @@ static int enable_ipi(int hart)
return 0; return 0;
} }
static int init_plic(void) int riscv_init_ipi(void)
{ {
struct udevice *dev;
ofnode node;
int ret; int ret;
long *base = syscon_get_first_range(RISCV_SYSCON_PLIC);
ofnode node;
struct udevice *dev;
u32 reg; u32 reg;
if (IS_ERR(base))
return PTR_ERR(base);
gd->arch.plic = base;
ret = uclass_find_first_device(UCLASS_CPU, &dev); ret = uclass_find_first_device(UCLASS_CPU, &dev);
if (ret) if (ret)
return ret; return ret;
else if (!dev)
return -ENODEV;
if (dev) { ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) { const char *device_type;
const char *device_type;
device_type = ofnode_read_string(node, "device_type"); device_type = ofnode_read_string(node, "device_type");
if (!device_type) if (!device_type)
continue; continue;
if (strcmp(device_type, "cpu")) if (strcmp(device_type, "cpu"))
continue; continue;
/* skip if hart is marked as not available */ /* skip if hart is marked as not available */
if (!ofnode_is_available(node)) if (!ofnode_is_available(node))
continue; continue;
/* read hart ID of CPU */ /* read hart ID of CPU */
ret = ofnode_read_u32(node, "reg", &reg); ret = ofnode_read_u32(node, "reg", &reg);
if (ret == 0) if (ret == 0)
enable_ipi(reg); enable_ipi(reg);
}
return 0;
} }
return -ENODEV; return 0;
}
int riscv_init_ipi(void)
{
long *ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
if (IS_ERR(ret))
return PTR_ERR(ret);
gd->arch.plic = ret;
return init_plic();
} }
int riscv_send_ipi(int hart) int riscv_send_ipi(int hart)