mx6sx: Add initial support for mx6sxsabresd board
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This commit is contained in:
Fabio Estevam
Stefano Babic
parent
d95b6ab87c
commit
14a1613140
6
board/freescale/mx6sxsabresd/Makefile
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6
board/freescale/mx6sxsabresd/Makefile
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@ -0,0 +1,6 @@
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# (C) Copyright 2014 Freescale Semiconductor, Inc.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := mx6sxsabresd.o
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105
board/freescale/mx6sxsabresd/imximage.cfg
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105
board/freescale/mx6sxsabresd/imximage.cfg
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@ -0,0 +1,105 @@
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/*
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* Copyright (C) 2014 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#define __ASSEMBLY__
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#include <config.h>
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/* image version */
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IMAGE_VERSION 2
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/*
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* Boot Device : one of
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* spi/sd/nand/onenand, qspi/nor
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*/
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BOOT_FROM sd
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/*
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* Device Configuration Data (DCD)
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*
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* Each entry must have the format:
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* Addr-type Address Value
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*
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* where:
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* Addr-type register length (1,2 or 4 bytes)
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* Address absolute address of the register
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* value value to be stored in the register
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*/
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DATA 4 0x020c4068 0xffffffff
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DATA 4 0x020c406c 0xffffffff
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DATA 4 0x020c4070 0xffffffff
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DATA 4 0x020c4074 0xffffffff
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DATA 4 0x020c4078 0xffffffff
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DATA 4 0x020c407c 0xffffffff
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DATA 4 0x020c4080 0xffffffff
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DATA 4 0x020c4084 0xffffffff
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DATA 4 0x020e0618 0x000c0000
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DATA 4 0x020e05fc 0x00000000
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DATA 4 0x020e032c 0x00000030
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DATA 4 0x020e0300 0x00000030
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DATA 4 0x020e02fc 0x00000030
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DATA 4 0x020e05f4 0x00000030
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DATA 4 0x020e0340 0x00000030
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DATA 4 0x020e0320 0x00000000
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DATA 4 0x020e0310 0x00000030
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DATA 4 0x020e0314 0x00000030
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DATA 4 0x020e0614 0x00000030
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DATA 4 0x020e05f8 0x00020000
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DATA 4 0x020e0330 0x00000030
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DATA 4 0x020e0334 0x00000030
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DATA 4 0x020e0338 0x00000030
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DATA 4 0x020e033c 0x00000030
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DATA 4 0x020e0608 0x00020000
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DATA 4 0x020e060c 0x00000030
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DATA 4 0x020e0610 0x00000030
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DATA 4 0x020e061c 0x00000030
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DATA 4 0x020e0620 0x00000030
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DATA 4 0x020e02ec 0x00000030
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DATA 4 0x020e02f0 0x00000030
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DATA 4 0x020e02f4 0x00000030
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DATA 4 0x020e02f8 0x00000030
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DATA 4 0x021b0800 0xa1390003
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DATA 4 0x021b080c 0x00270025
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DATA 4 0x021b0810 0x001B001E
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DATA 4 0x021b083c 0x4144013C
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DATA 4 0x021b0840 0x01300128
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DATA 4 0x021b0848 0x4044464A
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DATA 4 0x021b0850 0x3A383C34
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DATA 4 0x021b081c 0x33333333
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DATA 4 0x021b0820 0x33333333
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DATA 4 0x021b0824 0x33333333
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DATA 4 0x021b0828 0x33333333
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DATA 4 0x021b08b8 0x00000800
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DATA 4 0x021b0004 0x0002002d
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DATA 4 0x021b0008 0x00333030
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DATA 4 0x021b000c 0x676b52f3
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DATA 4 0x021b0010 0xb66d8b63
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DATA 4 0x021b0014 0x01ff00db
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DATA 4 0x021b0018 0x00011740
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DATA 4 0x021b001c 0x00008000
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DATA 4 0x021b002c 0x000026d2
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DATA 4 0x021b0030 0x006b1023
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DATA 4 0x021b0040 0x0000005f
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DATA 4 0x021b0000 0x84190000
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DATA 4 0x021b001c 0x04008032
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DATA 4 0x021b001c 0x00008033
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DATA 4 0x021b001c 0x00068031
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DATA 4 0x021b001c 0x05208030
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DATA 4 0x021b001c 0x04008040
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DATA 4 0x021b0020 0x00000800
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DATA 4 0x021b0818 0x00011117
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DATA 4 0x021b001c 0x00000000
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DATA 4 0x021b083c 0x41400138
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DATA 4 0x021b0840 0x012C011C
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DATA 4 0x021b0848 0x3C3C4044
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DATA 4 0x021b0850 0x34343638
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95
board/freescale/mx6sxsabresd/mx6sxsabresd.c
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95
board/freescale/mx6sxsabresd/mx6sxsabresd.c
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@ -0,0 +1,95 @@
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/*
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* Copyright (C) 2014 Freescale Semiconductor, Inc.
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*
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* Author: Fabio Estevam <fabio.estevam@freescale.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/arch/clock.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/mx6-pins.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/imx-common/iomux-v3.h>
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#include <asm/io.h>
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#include <linux/sizes.h>
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#include <common.h>
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#include <fsl_esdhc.h>
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#include <mmc.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
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PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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int dram_init(void)
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{
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gd->ram_size = PHYS_SDRAM_SIZE;
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return 0;
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}
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static iomux_v3_cfg_t const uart1_pads[] = {
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MX6_PAD_GPIO1_IO04__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
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MX6_PAD_GPIO1_IO05__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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static iomux_v3_cfg_t const usdhc4_pads[] = {
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MX6_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD4_DATA0__USDHC4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD4_DATA1__USDHC4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD4_DATA2__USDHC4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD4_DATA3__USDHC4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD4_DATA7__GPIO6_IO_21 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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static void setup_iomux_uart(void)
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{
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imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
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}
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int board_early_init_f(void)
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{
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setup_iomux_uart();
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return 0;
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}
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static struct fsl_esdhc_cfg usdhc_cfg[1] = {
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{USDHC4_BASE_ADDR},
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};
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int board_mmc_getcd(struct mmc *mmc)
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{
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return 1; /* Assume boot SD always present */
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}
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int board_mmc_init(bd_t *bis)
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{
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imx_iomux_v3_setup_multiple_pads(usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
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}
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int board_init(void)
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{
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/* Address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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return 0;
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}
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int checkboard(void)
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{
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puts("Board: MX6SX SABRE SDB\n");
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return 0;
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}
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@ -329,6 +329,7 @@ Active arm armv7 mx6 freescale mx6qsabreauto
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Active arm armv7 mx6 freescale mx6sabresd mx6dlsabresd mx6sabresd:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL Fabio Estevam <fabio.estevam@freescale.com>
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Active arm armv7 mx6 freescale mx6sabresd mx6qsabresd mx6sabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Fabio Estevam <fabio.estevam@freescale.com>
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Active arm armv7 mx6 freescale mx6slevk mx6slevk mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL Fabio Estevam <fabio.estevam@freescale.com>
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Active arm armv7 mx6 freescale mx6sxsabresd mx6sxsabresd mx6sxsabresd:IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg,MX6SX Fabio Estevam <fabio.estevam@freescale.com>
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Active arm armv7 mx6 gateworks gw_ventana gwventana gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6QDL,SPL Tim Harvey <tharvey@gateworks.com>
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Active arm armv7 mx6 solidrun hummingboard hummingboard_solo hummingboard:IMX_CONFIG=board/solidrun/hummingboard/solo.cfg,MX6S,DDR_MB=512 Jon Nettleton <jon.nettleton@gmail.com>
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Active arm armv7 omap3 - overo omap3_overo - Steve Sakoman <sakoman@gmail.com>
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186
include/configs/mx6sxsabresd.h
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186
include/configs/mx6sxsabresd.h
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/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the Freescale i.MX6SX Sabresd board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/imx-regs.h>
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#include <linux/sizes.h>
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#include "mx6_common.h"
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#define CONFIG_MX6
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_SYS_GENERIC_BOARD
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_MXC_GPIO
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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/* Command definition */
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_IMLS
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_LOADADDR 0x80800000
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#define CONFIG_SYS_TEXT_BASE 0x87800000
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"script=boot.scr\0" \
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"image=zImage\0" \
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"console=ttymxc0\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_file=imx6sx-sdb.dtb\0" \
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"fdt_addr=0x88000000\0" \
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"boot_fdt=try\0" \
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"ip_dyn=yes\0" \
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"mmcdev=0\0" \
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"mmcpart=1\0" \
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"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"loadbootscript=" \
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"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0" \
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"netargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"netboot=echo Booting from net ...; " \
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"run netargs; " \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
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"else " \
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"setenv get_cmd tftp; " \
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"fi; " \
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"${get_cmd} ${image}; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0"
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev};" \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run mmcboot; " \
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"else run netboot; " \
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"fi; " \
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"fi; " \
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"else run netboot; fi"
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_CBSIZE 1024
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 256
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000)
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_STACKSIZE SZ_128K
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define PHYS_SDRAM_SIZE SZ_1G
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* MMC Configuration */
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_FAT
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#define CONFIG_DOS_PARTITION
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/* FLASH and environment organization */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_OFFSET (6 * SZ_64K)
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#define CONFIG_ENV_SIZE SZ_8K
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_OF_LIBFDT
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#define CONFIG_CMD_BOOTZ
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#ifndef CONFIG_SYS_DCACHE_OFF
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#define CONFIG_CMD_CACHE
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#endif
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#endif /* __CONFIG_H */
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