rockchip: video: split RK3288-specific part off from rk_hdmi
To prepare for the addition of RK3399 HDMI support, the HDMI driver is refactored and broken into a chip-specific and a generic part. This change adds the internal interfaces, makes common/reusable functions externally visible and splits the RK3288 driver into a separate file. For the probing of regulators, we reuse the infrastructure created during the VOP refactoring... i.e. we simply call into the helper function defined for the VOP. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Philipp Tomsich
Simon Glass
parent
f210e5574f
commit
147fd3ac5a
@ -11,6 +11,7 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288_vop.o
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obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399_vop.o
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obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o
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obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o
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obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o
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obj-hdmi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_hdmi.o
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obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o $(obj-hdmi-y)
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obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o
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endif
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116
drivers/video/rockchip/rk3288_hdmi.c
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116
drivers/video/rockchip/rk3288_hdmi.c
Normal file
@ -0,0 +1,116 @@
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/*
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* Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <clk.h>
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#include <display.h>
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#include <dm.h>
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#include <dw_hdmi.h>
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#include <edid.h>
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#include <regmap.h>
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#include <syscon.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/grf_rk3288.h>
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#include <power/regulator.h>
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#include "rk_hdmi.h"
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static int rk3288_hdmi_enable(struct udevice *dev, int panel_bpp,
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const struct display_timing *edid)
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{
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struct rk_hdmi_priv *priv = dev_get_priv(dev);
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struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
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int vop_id = uc_plat->source_id;
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struct rk3288_grf *grf = priv->grf;
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/* hdmi source select hdmi controller */
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rk_setreg(&grf->soc_con6, 1 << 15);
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/* hdmi data from vop id */
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rk_clrsetreg(&grf->soc_con6, 1 << 4, (vop_id == 1) ? (1 << 4) : 0);
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return 0;
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}
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static int rk3288_hdmi_ofdata_to_platdata(struct udevice *dev)
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{
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struct rk_hdmi_priv *priv = dev_get_priv(dev);
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struct dw_hdmi *hdmi = &priv->hdmi;
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hdmi->i2c_clk_high = 0x7a;
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hdmi->i2c_clk_low = 0x8d;
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/*
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* TODO(sjg@chromium.org): The above values don't work - these
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* ones work better, but generate lots of errors in the data.
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*/
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hdmi->i2c_clk_high = 0x0d;
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hdmi->i2c_clk_low = 0x0d;
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return rk_hdmi_ofdata_to_platdata(dev);
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}
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static int rk3288_clk_config(struct udevice *dev)
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{
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struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
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struct clk clk;
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int ret;
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/*
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* Configure the maximum clock to permit whatever resolution the
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* monitor wants
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*/
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ret = clk_get_by_index(uc_plat->src_dev, 0, &clk);
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if (ret >= 0) {
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ret = clk_set_rate(&clk, 384000000);
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clk_free(&clk);
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}
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if (ret < 0) {
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debug("%s: Failed to set clock in source device '%s': ret=%d\n",
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__func__, uc_plat->src_dev->name, ret);
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return ret;
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}
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return 0;
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}
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static const char * const rk3288_regulator_names[] = {
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"vcc50_hdmi"
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};
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static int rk3288_hdmi_probe(struct udevice *dev)
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{
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/* Enable VOP clock for RK3288 */
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rk3288_clk_config(dev);
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/* Enable regulators required for HDMI */
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rk_hdmi_probe_regulators(dev, rk3288_regulator_names,
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ARRAY_SIZE(rk3288_regulator_names));
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return rk_hdmi_probe(dev);
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}
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static const struct dm_display_ops rk3288_hdmi_ops = {
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.read_edid = rk_hdmi_read_edid,
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.enable = rk3288_hdmi_enable,
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};
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static const struct udevice_id rk3288_hdmi_ids[] = {
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{ .compatible = "rockchip,rk3288-dw-hdmi" },
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{ }
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};
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U_BOOT_DRIVER(rk3288_hdmi_rockchip) = {
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.name = "rk3288_hdmi_rockchip",
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.id = UCLASS_DISPLAY,
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.of_match = rk3288_hdmi_ids,
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.ops = &rk3288_hdmi_ops,
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.ofdata_to_platdata = rk3288_hdmi_ofdata_to_platdata,
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.probe = rk3288_hdmi_probe,
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.priv_auto_alloc_size = sizeof(struct rk_hdmi_priv),
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};
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@ -1,4 +1,5 @@
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/*
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* Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
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* Copyright (c) 2015 Google, Inc
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* Copyright 2014 Rockchip Inc.
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*
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@ -17,13 +18,9 @@
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/grf_rk3288.h>
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#include <power/regulator.h>
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struct rk_hdmi_priv {
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struct dw_hdmi hdmi;
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struct rk3288_grf *grf;
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};
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#include <asm/arch/hardware.h>
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#include "rk_hdmi.h"
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#include "rk_vop.h" /* for rk_vop_probe_regulators */
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static const struct hdmi_phy_config rockchip_phy_config[] = {
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{
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@ -75,22 +72,14 @@ static const struct hdmi_mpll_config rockchip_mpll_cfg[] = {
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}
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};
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static int rk_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size)
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int rk_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size)
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{
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struct rk_hdmi_priv *priv = dev_get_priv(dev);
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return dw_hdmi_read_edid(&priv->hdmi, buf, buf_size);
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}
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static int rk_hdmi_enable(struct udevice *dev, int panel_bpp,
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const struct display_timing *edid)
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{
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struct rk_hdmi_priv *priv = dev_get_priv(dev);
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return dw_hdmi_enable(&priv->hdmi, edid);
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}
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static int rk_hdmi_ofdata_to_platdata(struct udevice *dev)
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int rk_hdmi_ofdata_to_platdata(struct udevice *dev)
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{
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struct rk_hdmi_priv *priv = dev_get_priv(dev);
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struct dw_hdmi *hdmi = &priv->hdmi;
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@ -98,15 +87,9 @@ static int rk_hdmi_ofdata_to_platdata(struct udevice *dev)
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hdmi->ioaddr = (ulong)devfdt_get_addr(dev);
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hdmi->mpll_cfg = rockchip_mpll_cfg;
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hdmi->phy_cfg = rockchip_phy_config;
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hdmi->i2c_clk_high = 0x7a;
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hdmi->i2c_clk_low = 0x8d;
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/*
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* TODO(sjg@chromium.org): The above values don't work - these ones
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* work better, but generate lots of errors in the data.
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*/
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hdmi->i2c_clk_high = 0x0d;
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hdmi->i2c_clk_low = 0x0d;
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/* hdmi->i2c_clk_{high,low} are set up by the SoC driver */
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hdmi->reg_io_width = 4;
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hdmi->phy_set = dw_hdmi_phy_cfg;
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@ -115,53 +98,17 @@ static int rk_hdmi_ofdata_to_platdata(struct udevice *dev)
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return 0;
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}
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static int rk_hdmi_probe(struct udevice *dev)
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void rk_hdmi_probe_regulators(struct udevice *dev,
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const char * const *names, int cnt)
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{
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rk_vop_probe_regulators(dev, names, cnt);
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}
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int rk_hdmi_probe(struct udevice *dev)
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{
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struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
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struct rk_hdmi_priv *priv = dev_get_priv(dev);
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struct dw_hdmi *hdmi = &priv->hdmi;
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struct udevice *reg;
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struct clk clk;
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int ret;
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int vop_id = uc_plat->source_id;
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ret = clk_get_by_index(dev, 0, &clk);
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if (ret >= 0) {
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ret = clk_set_rate(&clk, 0);
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clk_free(&clk);
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}
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if (ret) {
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debug("%s: Failed to set hdmi clock: ret=%d\n", __func__, ret);
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return ret;
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}
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/*
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* Configure the maximum clock to permit whatever resolution the
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* monitor wants
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*/
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ret = clk_get_by_index(uc_plat->src_dev, 0, &clk);
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if (ret >= 0) {
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ret = clk_set_rate(&clk, 384000000);
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clk_free(&clk);
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}
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if (ret < 0) {
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debug("%s: Failed to set clock in source device '%s': ret=%d\n",
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__func__, uc_plat->src_dev->name, ret);
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return ret;
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}
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ret = regulator_get_by_platname("vcc50_hdmi", ®);
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if (!ret)
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ret = regulator_set_enable(reg, true);
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if (ret)
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debug("%s: Cannot set regulator vcc50_hdmi\n", __func__);
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/* hdmi source select hdmi controller */
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rk_setreg(&priv->grf->soc_con6, 1 << 15);
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/* hdmi data from vop id */
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rk_clrsetreg(&priv->grf->soc_con6, 1 << 4,
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(vop_id == 1) ? (1 << 4) : 0);
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ret = dw_hdmi_phy_wait_for_hpd(hdmi);
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if (ret < 0) {
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@ -174,23 +121,3 @@ static int rk_hdmi_probe(struct udevice *dev)
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return 0;
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}
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static const struct dm_display_ops rk_hdmi_ops = {
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.read_edid = rk_hdmi_read_edid,
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.enable = rk_hdmi_enable,
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};
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static const struct udevice_id rk_hdmi_ids[] = {
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{ .compatible = "rockchip,rk3288-dw-hdmi" },
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{ }
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};
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U_BOOT_DRIVER(hdmi_rockchip) = {
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.name = "hdmi_rockchip",
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.id = UCLASS_DISPLAY,
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.of_match = rk_hdmi_ids,
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.ops = &rk_hdmi_ops,
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.ofdata_to_platdata = rk_hdmi_ofdata_to_platdata,
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.probe = rk_hdmi_probe,
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.priv_auto_alloc_size = sizeof(struct rk_hdmi_priv),
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};
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32
drivers/video/rockchip/rk_hdmi.h
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32
drivers/video/rockchip/rk_hdmi.h
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@ -0,0 +1,32 @@
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/*
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* Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __RK_HDMI_H__
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#define __RK_HDMI_H__
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struct rkhdmi_driverdata {
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/* configuration */
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u8 i2c_clk_high;
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u8 i2c_clk_low;
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const char * const *regulator_names;
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u32 regulator_names_cnt;
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/* setters/getters */
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int (*set_input_vop)(struct udevice *dev);
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int (*clk_config)(struct udevice *dev);
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};
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struct rk_hdmi_priv {
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struct dw_hdmi hdmi;
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void *grf;
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};
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int rk_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size);
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void rk_hdmi_probe_regulators(struct udevice *dev,
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const char * const *names, int cnt);
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int rk_hdmi_ofdata_to_platdata(struct udevice *dev);
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int rk_hdmi_probe(struct udevice *dev);
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#endif
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