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ARM: tegra: enable standard clock/reset APIs everywhere

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Implementations of the standard clock and reset APIs are available on all
Tegra SoCs now, so enable compilation of those uclasses.

Enable the Tegra CAR drivers for all SoCs prior to the BPMP being
available. This provides an implementation of those APIs everywhere.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Stephen Warren 2016-09-13 10:46:00 -06:00 committed by Tom Warren
parent 7468676684
commit 140a9eaff1
1 changed files with 11 additions and 3 deletions
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14
arch/arm/mach-tegra/Kconfig
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@ -22,6 +22,7 @@ config TEGRA_IVC
config TEGRA_COMMON
bool "Tegra common options"
select CLK
select DM
select DM_ETH
select DM_GPIO
@ -31,12 +32,20 @@ config TEGRA_COMMON
select DM_PCI
select DM_PCI_COMPAT
select DM_PWM
select DM_RESET
select DM_SERIAL
select DM_SPI
select DM_SPI_FLASH
select MISC
select OF_CONTROL
select VIDCONSOLE_AS_LCD if DM_VIDEO
config TEGRA_NO_BPMP
bool "Tegra common options for SoCs without BPMP"
select TEGRA_CAR
select TEGRA_CAR_CLOCK
select TEGRA_CAR_RESET
config TEGRA_ARMV7_COMMON
bool "Tegra 32-bit common options"
select CPU_V7
@ -44,6 +53,7 @@ config TEGRA_ARMV7_COMMON
select SUPPORT_SPL
select TEGRA_COMMON
select TEGRA_GPIO
select TEGRA_NO_BPMP
config TEGRA_ARMV8_COMMON
bool "Tegra 64-bit common options"
@ -74,13 +84,11 @@ config TEGRA210
bool "Tegra210 family"
select TEGRA_GPIO
select TEGRA_ARMV8_COMMON
select TEGRA_NO_BPMP
config TEGRA186
bool "Tegra186 family"
select CLK
select DM_MAILBOX
select DM_RESET
select MISC
select TEGRA186_BPMP
select TEGRA186_CLOCK
select TEGRA186_GPIO