dm: fpga: Introduce new uclass
For future DM based FPGA drivers and for now to have a meaningful logging class for old FPGA drivers. Suggested-by: Michal Simek <michal.simek@amd.com> Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Dahl <post@lespocky.de> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20220930120430.42307-2-post@lespocky.de Signed-off-by: Michal Simek <michal.simek@amd.com>
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@ -945,6 +945,7 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
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F: drivers/fpga/
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F: cmd/fpga.c
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F: include/fpga.h
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F: test/dm/fpga.c
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FLATTENED DEVICE TREE
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M: Simon Glass <sjg@chromium.org>
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@ -652,6 +652,10 @@
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};
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};
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fpga {
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compatible = "sandbox,fpga";
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};
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pinctrl-gpio {
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compatible = "sandbox,pinctrl-gpio";
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@ -118,4 +118,23 @@ config SPL_FPGA_LOAD_SECURE
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Enables the fpga loads() functions that are used to load secure
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(authenticated or encrypted or both) bitstreams on to FPGA.
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config DM_FPGA
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bool "Enable Driver Model for FPGA drivers"
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depends on DM
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select FPGA
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help
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Enable driver model for Field-Programmable Gate Array (FPGA) devices.
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The devices cover a wide range of applications and are configured at
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runtime by loading a bitstream into the FPGA device.
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Loading a bitstream from any kind of storage is the main task of the
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FPGA drivers.
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For now this uclass has no methods yet.
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config SANDBOX_FPGA
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bool "Enable sandbox FPGA driver"
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depends on SANDBOX && DM_FPGA
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help
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This is a driver model based FPGA driver for sandbox.
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Currently it is a stub only, as there are no usable uclass methods yet.
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endmenu
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@ -4,6 +4,9 @@
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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obj-y += fpga.o
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obj-$(CONFIG_DM_FPGA) += fpga-uclass.o
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obj-$(CONFIG_SANDBOX_FPGA) += sandbox.o
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obj-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
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obj-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
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obj-$(CONFIG_FPGA_VERSALPL) += versalpl.o
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11
drivers/fpga/fpga-uclass.c
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11
drivers/fpga/fpga-uclass.c
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@ -0,0 +1,11 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2022 Alexander Dahl <post@lespocky.de>
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*/
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#include <dm.h>
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UCLASS_DRIVER(fpga) = {
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.name = "fpga",
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.id = UCLASS_FPGA,
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};
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17
drivers/fpga/sandbox.c
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17
drivers/fpga/sandbox.c
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@ -0,0 +1,17 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2022 Alexander Dahl <post@lespocky.de>
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*/
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#include <dm.h>
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static const struct udevice_id sandbox_fpga_match[] = {
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{ .compatible = "sandbox,fpga" },
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(sandbox_fpga) = {
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.name = "sandbox_fpga",
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.id = UCLASS_FPGA,
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.of_match = sandbox_fpga_match,
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};
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@ -56,6 +56,7 @@ enum uclass_id {
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UCLASS_ETH, /* Ethernet device */
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UCLASS_ETH_PHY, /* Ethernet PHY device */
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UCLASS_FIRMWARE, /* Firmware */
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UCLASS_FPGA, /* FPGA device */
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UCLASS_FUZZING_ENGINE, /* Fuzzing engine */
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UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */
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UCLASS_GPIO, /* Bank of general-purpose I/O pins */
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@ -47,6 +47,7 @@ ifneq ($(CONFIG_EFI_PARTITION),)
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obj-$(CONFIG_FASTBOOT_FLASH_MMC) += fastboot.o
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endif
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obj-$(CONFIG_FIRMWARE) += firmware.o
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obj-$(CONFIG_DM_FPGA) += fpga.o
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obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock.o
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obj-$(CONFIG_DM_I2C) += i2c.o
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obj-$(CONFIG_SOUND) += i2s.o
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20
test/dm/fpga.c
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20
test/dm/fpga.c
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@ -0,0 +1,20 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2022 Alexander Dahl <post@lespocky.de>
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*/
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#include <dm.h>
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#include <dm/test.h>
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#include <test/test.h>
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#include <test/ut.h>
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static int dm_test_fpga(struct unit_test_state *uts)
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{
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struct udevice *dev;
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ut_assertok(uclass_first_device_err(UCLASS_FPGA, &dev));
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return 0;
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}
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DM_TEST(dm_test_fpga, UT_TESTF_SCAN_FDT);
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