dm: fpga: Introduce new uclass

For future DM based FPGA drivers and for now to have a meaningful
logging class for old FPGA drivers.

Suggested-by: Michal Simek <michal.simek@amd.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Dahl <post@lespocky.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20220930120430.42307-2-post@lespocky.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Alexander Dahl 2022-09-30 14:04:30 +02:00 committed by Michal Simek
parent 2d45913534
commit 1323d08bdf
9 changed files with 77 additions and 0 deletions

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@ -945,6 +945,7 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
F: drivers/fpga/
F: cmd/fpga.c
F: include/fpga.h
F: test/dm/fpga.c
FLATTENED DEVICE TREE
M: Simon Glass <sjg@chromium.org>

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@ -652,6 +652,10 @@
};
};
fpga {
compatible = "sandbox,fpga";
};
pinctrl-gpio {
compatible = "sandbox,pinctrl-gpio";

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@ -118,4 +118,23 @@ config SPL_FPGA_LOAD_SECURE
Enables the fpga loads() functions that are used to load secure
(authenticated or encrypted or both) bitstreams on to FPGA.
config DM_FPGA
bool "Enable Driver Model for FPGA drivers"
depends on DM
select FPGA
help
Enable driver model for Field-Programmable Gate Array (FPGA) devices.
The devices cover a wide range of applications and are configured at
runtime by loading a bitstream into the FPGA device.
Loading a bitstream from any kind of storage is the main task of the
FPGA drivers.
For now this uclass has no methods yet.
config SANDBOX_FPGA
bool "Enable sandbox FPGA driver"
depends on SANDBOX && DM_FPGA
help
This is a driver model based FPGA driver for sandbox.
Currently it is a stub only, as there are no usable uclass methods yet.
endmenu

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@ -4,6 +4,9 @@
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
obj-y += fpga.o
obj-$(CONFIG_DM_FPGA) += fpga-uclass.o
obj-$(CONFIG_SANDBOX_FPGA) += sandbox.o
obj-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
obj-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
obj-$(CONFIG_FPGA_VERSALPL) += versalpl.o

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@ -0,0 +1,11 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2022 Alexander Dahl <post@lespocky.de>
*/
#include <dm.h>
UCLASS_DRIVER(fpga) = {
.name = "fpga",
.id = UCLASS_FPGA,
};

17
drivers/fpga/sandbox.c Normal file
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@ -0,0 +1,17 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2022 Alexander Dahl <post@lespocky.de>
*/
#include <dm.h>
static const struct udevice_id sandbox_fpga_match[] = {
{ .compatible = "sandbox,fpga" },
{ /* sentinel */ }
};
U_BOOT_DRIVER(sandbox_fpga) = {
.name = "sandbox_fpga",
.id = UCLASS_FPGA,
.of_match = sandbox_fpga_match,
};

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@ -56,6 +56,7 @@ enum uclass_id {
UCLASS_ETH, /* Ethernet device */
UCLASS_ETH_PHY, /* Ethernet PHY device */
UCLASS_FIRMWARE, /* Firmware */
UCLASS_FPGA, /* FPGA device */
UCLASS_FUZZING_ENGINE, /* Fuzzing engine */
UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */
UCLASS_GPIO, /* Bank of general-purpose I/O pins */

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@ -47,6 +47,7 @@ ifneq ($(CONFIG_EFI_PARTITION),)
obj-$(CONFIG_FASTBOOT_FLASH_MMC) += fastboot.o
endif
obj-$(CONFIG_FIRMWARE) += firmware.o
obj-$(CONFIG_DM_FPGA) += fpga.o
obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock.o
obj-$(CONFIG_DM_I2C) += i2c.o
obj-$(CONFIG_SOUND) += i2s.o

20
test/dm/fpga.c Normal file
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@ -0,0 +1,20 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2022 Alexander Dahl <post@lespocky.de>
*/
#include <dm.h>
#include <dm/test.h>
#include <test/test.h>
#include <test/ut.h>
static int dm_test_fpga(struct unit_test_state *uts)
{
struct udevice *dev;
ut_assertok(uclass_first_device_err(UCLASS_FPGA, &dev));
return 0;
}
DM_TEST(dm_test_fpga, UT_TESTF_SCAN_FDT);