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net: sunxi_emac: Remove non-DM pin setup

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This is now handled automatically by the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Samuel Holland 2021-08-28 13:22:41 -05:00 committed by Andre Przywara
parent fcdbbd68d3
commit 12bd00aafc
2 changed files with 1 additions and 7 deletions
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1
arch/arm/include/asm/arch-sunxi/gpio.h
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@ -135,7 +135,6 @@ enum sunxi_gpio_number {
#define SUNXI_GPIO_OUTPUT 1
#define SUNXI_GPIO_DISABLE 7
#define SUNXI_GPA_EMAC 2
#define SUN6I_GPA_GMAC 2
#define SUN7I_GPA_GMAC 5
#define SUN8I_H3_GPA_UART0 2

7
drivers/net/sunxi_emac.c
View File

@ -17,7 +17,6 @@
#include <net.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/gpio.h>
/* EMAC register */
struct emac_regs {
@ -511,15 +510,11 @@ static int sunxi_emac_board_setup(struct udevice *dev,
struct sunxi_sramc_regs *sram =
(struct sunxi_sramc_regs *)SUNXI_SRAMC_BASE;
struct emac_regs *regs = priv->regs;
int pin, ret;
int ret;
/* Map SRAM to EMAC */
setbits_le32(&sram->ctrl1, 0x5 << 2);
/* Configure pin mux settings for MII Ethernet */
for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++)
sunxi_gpio_set_cfgpin(pin, SUNXI_GPA_EMAC);
/* Set up clock gating */
ret = clk_enable(&priv->clk);
if (ret) {