imx-common/cmd_bmode.c: add imx bmode (bootmode) command
This is useful for forcing the ROM's usb downloader to activate upon a watchdog reset. Or, you can boot from either SD Card. Currently, support added for MX53 and MX6Q Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Note: MX53 support untested. Acked-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Troy Kisky
Albert ARIBAUD
parent
d1c679a46d
commit
124a06d7fb
@ -29,6 +29,7 @@ LIB = $(obj)libimx-common.o
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COBJS-y = iomux-v3.o timer.o cpu.o speed.o
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COBJS-$(CONFIG_I2C_MXC) += i2c.o
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COBJS-$(CONFIG_CMD_BMODE) += cmd_bmode.o
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COBJS := $(sort $(COBJS-y))
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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119
arch/arm/cpu/armv7/imx-common/cmd_bmode.c
Normal file
119
arch/arm/cpu/armv7/imx-common/cmd_bmode.c
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@ -0,0 +1,119 @@
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/*
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* Copyright (C) 2012 Boundary Devices Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/errno.h>
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#include <asm/io.h>
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#include <asm/imx-common/boot_mode.h>
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#include <malloc.h>
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static const struct boot_mode *modes[2];
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static const struct boot_mode *search_modes(char *arg)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(modes); i++) {
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const struct boot_mode *p = modes[i];
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if (p) {
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while (p->name) {
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if (!strcmp(p->name, arg))
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return p;
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p++;
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}
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}
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}
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return NULL;
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}
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static int create_usage(char *dest)
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{
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int i;
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int size = 0;
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for (i = 0; i < ARRAY_SIZE(modes); i++) {
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const struct boot_mode *p = modes[i];
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if (p) {
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while (p->name) {
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int len = strlen(p->name);
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if (dest) {
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memcpy(dest, p->name, len);
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dest += len;
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*dest++ = '|';
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}
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size += len + 1;
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p++;
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}
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}
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}
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if (dest)
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memcpy(dest - 1, " [noreset]", 11); /* include trailing 0 */
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size += 10;
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return size;
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}
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static int do_boot_mode(cmd_tbl_t *cmdtp, int flag, int argc,
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char * const argv[])
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{
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const struct boot_mode *p;
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int reset_requested = 1;
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if (argc < 2)
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return CMD_RET_USAGE;
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p = search_modes(argv[1]);
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if (!p)
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return CMD_RET_USAGE;
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if (argc == 3) {
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if (strcmp(argv[2], "noreset"))
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return CMD_RET_USAGE;
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reset_requested = 0;
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}
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boot_mode_apply(p->cfg_val);
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if (reset_requested && p->cfg_val)
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do_reset(NULL, 0, 0, NULL);
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return 0;
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}
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U_BOOT_CMD(
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bmode, 3, 0, do_boot_mode,
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NULL,
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"");
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void add_board_boot_modes(const struct boot_mode *p)
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{
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int size;
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char *dest;
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if (__u_boot_cmd_bmode.usage) {
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free(__u_boot_cmd_bmode.usage);
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__u_boot_cmd_bmode.usage = NULL;
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}
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modes[0] = p;
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modes[1] = soc_boot_modes;
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size = create_usage(NULL);
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dest = malloc(size);
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if (dest) {
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create_usage(dest);
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__u_boot_cmd_bmode.usage = dest;
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}
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}
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@ -30,6 +30,7 @@
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#include <asm/errno.h>
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#include <asm/io.h>
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#include <asm/imx-common/boot_mode.h>
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#if !(defined(CONFIG_MX51) || defined(CONFIG_MX53))
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#error "CPU_TYPE not defined"
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@ -123,3 +124,33 @@ void set_chipselect_size(int const cs_size)
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writel(reg, &iomuxc_regs->gpr1);
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}
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#ifdef CONFIG_MX53
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void boot_mode_apply(unsigned cfg_val)
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{
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writel(cfg_val, &((struct srtc_regs *)SRTC_BASE_ADDR)->lpgr);
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}
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/*
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* cfg_val will be used for
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* Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0]
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*
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* If bit 28 of LPGR is set upon watchdog reset,
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* bits[25:0] of LPGR will move to SBMR.
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*/
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const struct boot_mode soc_boot_modes[] = {
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{"normal", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)},
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/* usb or serial download */
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{"usb", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x13)},
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{"sata", MAKE_CFGVAL(0x28, 0x00, 0x00, 0x12)},
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{"escpi1:0", MAKE_CFGVAL(0x38, 0x20, 0x00, 0x12)},
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{"escpi1:1", MAKE_CFGVAL(0x38, 0x20, 0x04, 0x12)},
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{"escpi1:2", MAKE_CFGVAL(0x38, 0x20, 0x08, 0x12)},
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{"escpi1:3", MAKE_CFGVAL(0x38, 0x20, 0x0c, 0x12)},
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/* 4 bit bus width */
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{"esdhc1", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x12)},
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{"esdhc2", MAKE_CFGVAL(0x40, 0x20, 0x08, 0x12)},
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{"esdhc3", MAKE_CFGVAL(0x40, 0x20, 0x10, 0x12)},
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{"esdhc4", MAKE_CFGVAL(0x40, 0x20, 0x18, 0x12)},
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{NULL, 0},
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};
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#endif
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@ -29,6 +29,7 @@
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/imx-common/boot_mode.h>
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u32 get_cpu_rev(void)
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{
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@ -141,3 +142,38 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
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}
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#endif
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void boot_mode_apply(unsigned cfg_val)
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{
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unsigned reg;
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struct src_regs *psrc = (struct src_regs *)SRC_BASE_ADDR;
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writel(cfg_val, &psrc->gpr9);
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reg = readl(&psrc->gpr10);
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if (cfg_val)
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reg |= 1 << 28;
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else
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reg &= ~(1 << 28);
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writel(reg, &psrc->gpr10);
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}
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/*
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* cfg_val will be used for
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* Boot_cfg4[7:0]:Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0]
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* After reset, if GPR10[28] is 1, ROM will copy GPR9[25:0]
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* to SBMR1, which will determine the boot device.
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*/
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const struct boot_mode soc_boot_modes[] = {
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{"normal", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)},
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/* reserved value should start rom usb */
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{"usb", MAKE_CFGVAL(0x01, 0x00, 0x00, 0x00)},
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{"sata", MAKE_CFGVAL(0x20, 0x00, 0x00, 0x00)},
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{"escpi1:0", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x08)},
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{"escpi1:1", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x18)},
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{"escpi1:2", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x28)},
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{"escpi1:3", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x38)},
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/* 4 bit bus width */
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{"esdhc1", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)},
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{"esdhc2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
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{"esdhc3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
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{"esdhc4", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
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{NULL, 0},
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};
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@ -459,6 +459,24 @@ struct src {
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u32 simr;
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};
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struct srtc_regs {
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u32 lpscmr; /* 0x00 */
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u32 lpsclr; /* 0x04 */
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u32 lpsar; /* 0x08 */
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u32 lpsmcr; /* 0x0c */
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u32 lpcr; /* 0x10 */
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u32 lpsr; /* 0x14 */
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u32 lppdr; /* 0x18 */
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u32 lpgr; /* 0x1c */
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u32 hpcmr; /* 0x20 */
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u32 hpclr; /* 0x24 */
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u32 hpamr; /* 0x28 */
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u32 hpalr; /* 0x2c */
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u32 hpcr; /* 0x30 */
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u32 hpisr; /* 0x34 */
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u32 hpienr; /* 0x38 */
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};
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/* CSPI registers */
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struct cspi_regs {
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u32 rxdata;
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@ -448,5 +448,26 @@ struct iomuxc_base_regs {
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u32 daisy[104]; /* 0x7b0..94c */
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};
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struct src_regs {
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u32 scr; /* 0x00 */
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u32 sbmr1; /* 0x04 */
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u32 srsr; /* 0x08 */
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u32 reserved1; /* 0x0c */
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u32 reserved2; /* 0x10 */
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u32 sisr; /* 0x14 */
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u32 simr; /* 0x18 */
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u32 sbmr2; /* 0x1c */
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u32 gpr1; /* 0x20 */
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u32 gpr2; /* 0x24 */
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u32 gpr3; /* 0x28 */
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u32 gpr4; /* 0x2c */
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u32 gpr5; /* 0x30 */
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u32 gpr6; /* 0x34 */
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u32 gpr7; /* 0x38 */
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u32 gpr8; /* 0x3c */
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u32 gpr9; /* 0x40 */
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u32 gpr10; /* 0x44 */
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};
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#endif /* __ASSEMBLER__*/
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#endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */
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36
arch/arm/include/asm/imx-common/boot_mode.h
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36
arch/arm/include/asm/imx-common/boot_mode.h
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@ -0,0 +1,36 @@
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/*
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* Copyright (C) 2012 Boundary Devices Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _ASM_BOOT_MODE_H
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#define _ASM_BOOT_MODE_H
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#define MAKE_CFGVAL(cfg1, cfg2, cfg3, cfg4) \
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((cfg4) << 24) | ((cfg3) << 16) | ((cfg2) << 8) | (cfg1)
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struct boot_mode {
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const char *name;
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unsigned cfg_val;
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};
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void add_board_boot_modes(const struct boot_mode *p);
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void boot_mode_apply(unsigned cfg_val);
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extern const struct boot_mode soc_boot_modes[];
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#endif
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