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microblaze: cache: introduce flush_dcache_range()

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Align microblaze with the other architectures and provide an
implementation for flush_dcache_range(). Also, remove the microblaze
exception in drivers/core/device.c.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-11-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Ovidiu Panait 2022-05-31 21:14:32 +03:00 committed by Michal Simek
parent 95b7a8fd12
commit 10f6508c07
2 changed files with 11 additions and 5 deletions
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11
arch/microblaze/cpu/cache.c
View File

@ -49,6 +49,17 @@ static void __flush_dcache(ulong addr, ulong size)
}
}
void flush_dcache_range(unsigned long start, unsigned long end)
{
if (start >= end) {
debug("Invalid dcache range - start: 0x%08lx end: 0x%08lx\n",
start, end);
return;
}
__flush_dcache(start, end - start);
}
void flush_dcache_all(void)
{
__flush_dcache(0, gd_cpuinfo()->dcache_size);

5
drivers/core/device.c
View File

@ -328,13 +328,8 @@ static void *alloc_priv(int size, uint flags)
* within this range at the start. The driver can then
* use normal flush-after-write, invalidate-before-read
* procedures.
*
* TODO(sjg@chromium.org): Drop this microblaze
* exception.
*/
#ifndef CONFIG_MICROBLAZE
flush_dcache_range((ulong)priv, (ulong)priv + size);
#endif
}
} else {
priv = calloc(1, size);