leandrof/u-boot
1
0
Fork 1
Code Issues Pull Requests Packages Projects Releases Wiki Activity

imx53: synchronise device tree with linux

Browse Source 
Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This commit is contained in:
Marcel Ziswiler 2022-10-22 23:59:40 +02:00 committed by Stefano Babic
parent fa4ce85194
commit 10f4f3f569
7 changed files with 580 additions and 286 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

420
arch/arm/dts/imx53-cx9020.dts
View File

@ -1,195 +1,133 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2016 Beckhoff Automation
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
* Copyright 2017 Beckhoff Automation GmbH & Co. KG
* based on imx53-qsb.dts
*/
/dts-v1/;
#include "imx53.dtsi"
#define MX53_PAD_EIM_D26__UART2_RXD_MUX 0x144 0x48c 0x880 0x2 0x0
#define MX53_PAD_EIM_D27__UART2_TXD_MUX 0x148 0x490 0x000 0x2 0x0
#define MX53_PAD_EIM_D28__UART2_RTS 0x14c 0x494 0x87c 0x2 0x0
#define MX53_PAD_EIM_D29__UART2_CTS 0x150 0x498 0x000 0x2 0x0
/ {
model = "Beckhoff CX9020-0100 i.MX53";
compatible = "fsl,imx53-qsb", "fsl,imx53";
model = "Beckhoff CX9020 Embedded PC";
compatible = "bhf,cx9020", "fsl,imx53";
chosen {
stdout-path = &uart2;
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
memory@70000000 {
device_type = "memory";
reg = <0x70000000 0x20000000>,
<0xb0000000 0x20000000>;
};
imx53-qsb {
pinctrl_hog: hoggrp {
fsl,pins = <
MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000
MX53_PAD_GPIO_8__GPIO1_8 0x80000000
MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000
MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000
MX53_PAD_GPIO_1__GPIO1_1 0x80000000
MX53_PAD_GPIO_4__GPIO1_4 0x80000000
MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000
MX53_PAD_GPIO_16__GPIO7_11 0x80000000
display-0 {
#address-cells =<1>;
#size-cells = <0>;
compatible = "fsl,imx-parallel-display";
interface-pix-fmt = "rgb24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp0>;
MX53_PAD_EIM_OE__EMI_WEIM_OE 0x80000000
MX53_PAD_EIM_WAIT__EMI_WEIM_WAIT 0x80000000
MX53_PAD_EIM_LBA__EMI_WEIM_LBA 0x80000000
MX53_PAD_EIM_RW__EMI_WEIM_RW 0x80000000
MX53_PAD_EIM_EB0__EMI_WEIM_EB_0 0x80000000
MX53_PAD_EIM_EB1__EMI_WEIM_EB_1 0x80000000
MX53_PAD_EIM_EB2__EMI_WEIM_EB_2 0x80000000
MX53_PAD_EIM_EB3__EMI_WEIM_EB_3 0x80000000
MX53_PAD_EIM_CS0__EMI_WEIM_CS_0 0x80000000
MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 0x80000000
MX53_PAD_EIM_A16__EMI_WEIM_A_16 0x80000000
MX53_PAD_EIM_A17__EMI_WEIM_A_17 0x80000000
MX53_PAD_EIM_A18__EMI_WEIM_A_18 0x80000000
MX53_PAD_EIM_A19__EMI_WEIM_A_19 0x80000000
MX53_PAD_EIM_A20__EMI_WEIM_A_20 0x80000000
MX53_PAD_EIM_A21__EMI_WEIM_A_21 0x80000000
MX53_PAD_EIM_A22__EMI_WEIM_A_22 0x80000000
MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0xa4
MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0xa4
MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0xa4
MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0xa4
MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0xa4
MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0xa4
MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0xa4
MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 0xa4
MX53_PAD_EIM_DA8__EMI_NAND_WEIM_DA_8 0xa4
MX53_PAD_EIM_DA9__EMI_NAND_WEIM_DA_9 0xa4
MX53_PAD_EIM_DA10__EMI_NAND_WEIM_DA_10 0xa4
MX53_PAD_EIM_DA11__EMI_NAND_WEIM_DA_11 0xa4
MX53_PAD_EIM_DA12__EMI_NAND_WEIM_DA_12 0xa4
MX53_PAD_EIM_DA13__EMI_NAND_WEIM_DA_13 0xa4
MX53_PAD_EIM_DA14__EMI_NAND_WEIM_DA_14 0xa4
MX53_PAD_EIM_DA15__EMI_NAND_WEIM_DA_15 0xa4
MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 0xa4
MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 0xa4
MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 0xa4
MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 0xa4
MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 0xa4
MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 0xa4
MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 0xa4
MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 0xa4
MX53_PAD_PATA_DATA8__EMI_NANDF_D_8 0xa4
MX53_PAD_PATA_DATA9__EMI_NANDF_D_9 0xa4
MX53_PAD_PATA_DATA10__EMI_NANDF_D_10 0xa4
MX53_PAD_PATA_DATA11__EMI_NANDF_D_11 0xa4
MX53_PAD_PATA_DATA12__EMI_NANDF_D_12 0xa4
MX53_PAD_PATA_DATA13__EMI_NANDF_D_13 0xa4
MX53_PAD_PATA_DATA14__EMI_NANDF_D_14 0xa4
MX53_PAD_PATA_DATA15__EMI_NANDF_D_15 0xa4
MX53_PAD_NANDF_CLE__GPIO6_7 0x00000001
MX53_PAD_NANDF_WP_B__GPIO6_9 0x00000001
MX53_PAD_NANDF_ALE__GPIO6_8 0x00000001
port@0 {
reg = <0>;
MX53_PAD_EIM_D23__GPIO3_23 0x80000000
MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000
MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000
MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000
MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000
MX53_PAD_CSI0_DAT8__I2C1_SDA 0x400001ec
MX53_PAD_CSI0_DAT9__I2C1_SCL 0x400001ec
MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000
MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5
MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5
MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5
MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5
MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 0x5
MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5
MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5
MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5
MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5
MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5
MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5
MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5
MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5
MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5
MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5
MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5
MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5
MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5
MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5
MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5
MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5
MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5
MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5
MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5
MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5
MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5
MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5
MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5
MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5
>;
display0_in: endpoint {
remote-endpoint = <&ipu_di0_disp0>;
};
};
pinctrl_fec0: fec0grp {
fsl,pins = <
MX53_PAD_FEC_MDC__FEC_MDC 0x4
MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc
MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180
MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180
MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180
MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180
MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180
MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4
MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4
MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4
>;
};
port@1 {
reg = <1>;
pinctrl_esdhc1: esdhc1grp {
fsl,pins = <
MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
>;
};
pinctrl_esdhc2: esdhc2grp {
fsl,pins = <
MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX53_PAD_EIM_D26__UART2_RXD_MUX 0x1e4
MX53_PAD_EIM_D27__UART2_TXD_MUX 0x1e4
MX53_PAD_EIM_D28__UART2_RTS 0x1e4
MX53_PAD_EIM_D29__UART2_CTS 0x1e4
>;
display0_out: endpoint {
remote-endpoint = <&tfp410_in>;
};
};
};
};
&uart2 {
pinctrl-names = "default";
uart-has-rtscts;
fsl,dte-mode;
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
dvi-connector {
compatible = "dvi-connector";
ddc-i2c-bus = <&i2c2>;
digital;
port {
dvi_connector_in: endpoint {
remote-endpoint = <&tfp410_out>;
};
};
};
dvi-converter {
compatible = "ti,tfp410";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
tfp410_in: endpoint {
remote-endpoint = <&display0_out>;
};
};
port@1 {
reg = <1>;
tfp410_out: endpoint {
remote-endpoint = <&dvi_connector_in>;
};
};
};
};
leds {
compatible = "gpio-leds";
pwr-r {
gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
pwr-g {
gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
pwr-b {
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
sd1-b {
linux,default-trigger = "mmc0";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
};
sd2-b {
linux,default-trigger = "mmc1";
gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
};
};
regulator-3p2v {
compatible = "regulator-fixed";
regulator-name = "3P2V";
regulator-min-microvolt = <3200000>;
regulator-max-microvolt = <3200000>;
regulator-always-on;
};
reg_usb_vbus: regulator-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&esdhc1 {
@ -210,22 +148,148 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
pinctrl-0 = <&pinctrl_fec0>;
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
};
&ipu_di0_disp0 {
remote-endpoint = <&display0_in>;
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
fsl,dte-mode;
status = "okay";
fixed-link { /* RMII fixed link to KZ8863 */
speed = <100>;
full-duplex;
};
};
&usbh1 {
vbus-supply = <&reg_usb_vbus>;
phy_type = "utmi";
status = "okay";
};
&usbotg {
dr_mode = "host";
dr_mode = "peripheral";
status = "okay";
};
&vpu {
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl_hog: hoggrp {
fsl,pins = <
MX53_PAD_GPIO_0__CCM_CLKO 0x1c4
MX53_PAD_GPIO_16__I2C3_SDA 0x1c4
MX53_PAD_EIM_D22__GPIO3_22 0x1c4
MX53_PAD_EIM_D23__GPIO3_23 0x1e4
MX53_PAD_EIM_D24__GPIO3_24 0x1e4
>;
};
pinctrl_esdhc1: esdhc1grp {
fsl,pins = <
MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
MX53_PAD_GPIO_1__ESDHC1_CD 0x1c4
MX53_PAD_EIM_D17__GPIO3_17 0x1e4
MX53_PAD_GPIO_3__GPIO1_3 0x1c4
>;
};
pinctrl_esdhc2: esdhc2grp {
fsl,pins = <
MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
MX53_PAD_GPIO_4__ESDHC2_CD 0x1e4
MX53_PAD_EIM_D20__GPIO3_20 0x1e4
MX53_PAD_GPIO_8__GPIO1_8 0x1c4
>;
};
pinctrl_fec: fecgrp {
fsl,pins = <
MX53_PAD_FEC_MDC__FEC_MDC 0x4
MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc
MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180
MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180
MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180
MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180
MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180
MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4
MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4
MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000
>;
};
pinctrl_ipu_disp0: ipudisp0grp {
fsl,pins = <
MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5
MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5
MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5
MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5
MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 0x5
MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5
MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5
MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5
MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5
MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5
MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5
MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5
MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5
MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5
MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5
MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5
MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5
MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5
MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5
MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5
MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5
MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5
MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5
MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5
MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5
MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5
MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5
MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5
MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX53_PAD_EIM_D26__UART2_RXD_MUX 0x1e4
MX53_PAD_EIM_D27__UART2_TXD_MUX 0x1e4
MX53_PAD_EIM_D28__UART2_RTS 0x1e4
MX53_PAD_EIM_D29__UART2_CTS 0x1e4
>;
};
};

2
arch/arm/dts/imx53-kp.dts
View File

@ -10,6 +10,8 @@
#include "imx53.dtsi"
#include "imx53-pinfunc.h"
#define IMX_PAD_SION 0x40000000
/ {
model = "K+P iMX53";
compatible = "kp,imx53-kp", "fsl,imx53";

306
arch/arm/dts/imx53-m53menlo.dts
View File

@ -5,12 +5,30 @@
/dts-v1/;
#include "imx53-m53.dtsi"
#include "imx53-m53menlo-u-boot.dtsi"
/ {
model = "MENLO M53 EMBEDDED DEVICE";
compatible = "menlo,m53menlo", "fsl,imx53";
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&pinctrl_power_button>;
pinctrl-names = "default";
power-button {
label = "Power button";
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
};
};
gpio-poweroff {
compatible = "gpio-poweroff";
pinctrl-0 = <&pinctrl_power_out>;
pinctrl-names = "default";
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@ -31,27 +49,60 @@
eth {
label = "EthLedYe";
gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
linux,default-trigger = "netdev";
};
};
lvds-decoder {
compatible = "ti,ds90cf364a", "lvds-decoder";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
lvds_decoder_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
port@1 {
reg = <1>;
lvds_decoder_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
panel {
compatible = "edt,etm070080dh6";
compatible = "edt,etm0700g0dh6";
pinctrl-0 = <&pinctrl_display_gpio>;
pinctrl-names = "default";
enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
port {
panel_in: endpoint {
remote-endpoint = <&lvds0_out>;
remote-endpoint = <&lvds_decoder_out>;
};
};
};
beeper {
compatible = "gpio-beeper";
pinctrl-0 = <&pinctrl_beeper>;
gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>;
};
reg_usbh1_vbus: regulator-usbh1-vbus {
compatible = "regulator-fixed";
regulator-name = "vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
gpio = <&gpio1 2 0>;
};
};
@ -75,6 +126,25 @@
assigned-clock-rates = <133333334>, <33333334>, <33333334>;
};
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>, <&gpio2 27 GPIO_ACTIVE_LOW>;
status = "okay";
spidev@0 {
compatible = "menlo,m53cpld";
spi-max-frequency = <25000000>;
reg = <0>;
};
spidev@1 {
compatible = "menlo,m53cpld";
spi-max-frequency = <25000000>;
reg = <1>;
};
};
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
@ -86,19 +156,81 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-handle = <&ethphy0>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 7 GPIO_ACTIVE_LOW>;
status = "okay";
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
&gpio1 {
gpio-line-names =
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "";
};
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};
&gpio2 {
gpio-line-names =
"", "", "", "",
"", "", "", "",
"TestPin_SV2_3", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "";
};
&gpio3 {
gpio-line-names =
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"CPLD_JTAG_TDI", "CPLD_JTAG_TMS", "", "",
"", "CPLD_JTAG_TDO", "", "";
};
&gpio5 {
gpio-line-names =
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "CPLD_JTAG_TCK", "KBD_intK",
"CPLD_int", "CPLD_JTAG_internal", "CPLD_D[0]", "CPLD_D[1]",
"CPLD_D[2]", "CPLD_D[3]", "CPLD_D[4]", "CPLD_D[5]",
"CPLD_D[6]", "CPLD_D[7]", "DISP_reset", "KBD_intI";
};
&gpio6 {
gpio-line-names =
"", "", "", "",
"CPLD_reset", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "";
};
&gpio7 {
gpio-line-names =
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "USB-OTG_OverCurrent", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "";
};
&i2c1 {
@ -148,27 +280,37 @@
imx53-m53evk {
hoggrp {
fsl,pins = <
MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4
MX53_PAD_EIM_EB3__GPIO2_31 0x1d5
MX53_PAD_PATA_DA_0__GPIO7_6 0x1d5
MX53_PAD_GPIO_19__CCM_CLKO 0x1d5
MX53_PAD_CSI0_MCLK__CCM_CSI0_MCLK 0x1d5
MX53_PAD_CSI0_DAT4__GPIO5_22 0x1d5
MX53_PAD_CSI0_DAT5__GPIO5_23 0x1d5
MX53_PAD_CSI0_DAT6__GPIO5_24 0x1d5
MX53_PAD_CSI0_DAT7__GPIO5_25 0x1d5
MX53_PAD_CSI0_DAT8__GPIO5_26 0x1d5
MX53_PAD_CSI0_DAT9__GPIO5_27 0x1d5
MX53_PAD_CSI0_DAT10__GPIO5_28 0x1d5
MX53_PAD_CSI0_DAT11__GPIO5_29 0x1d5
MX53_PAD_CSI0_DAT14__GPIO6_0 0x1d5
MX53_PAD_GPIO_19__CCM_CLKO 0x1e4
MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1e4
MX53_PAD_CSI0_DAT4__GPIO5_22 0x1e4
MX53_PAD_CSI0_DAT5__GPIO5_23 0x1c4
MX53_PAD_CSI0_DAT6__GPIO5_24 0x1e4
MX53_PAD_CSI0_DAT7__GPIO5_25 0x1e4
MX53_PAD_CSI0_DAT8__GPIO5_26 0x1e4
MX53_PAD_CSI0_DAT9__GPIO5_27 0x1c4
MX53_PAD_CSI0_DAT10__GPIO5_28 0x1e4
MX53_PAD_CSI0_DAT11__GPIO5_29 0x1e4
MX53_PAD_PATA_DATA11__GPIO2_11 0x1e4
MX53_PAD_EIM_D24__GPIO3_24 0x1e4
MX53_PAD_EIM_D25__GPIO3_25 0x1e4
MX53_PAD_EIM_D29__GPIO3_29 0x1e4
MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1e4
MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1e4
MX53_PAD_CSI0_DAT18__GPIO6_4 0x1c4
MX53_PAD_PATA_DATA8__GPIO2_8 0x1e4
>;
};
pinctrl_led: ledgrp {
fsl,pins = <
MX53_PAD_CSI0_DAT15__GPIO6_1 0x1d5
MX53_PAD_CSI0_DAT16__GPIO6_2 0x1d5
MX53_PAD_CSI0_DAT15__GPIO6_1 0x1c4
MX53_PAD_CSI0_DAT16__GPIO6_2 0x1c4
>;
};
pinctrl_beeper: beepergrp {
fsl,pins = <
MX53_PAD_CSI0_DAT17__GPIO6_3 0x1c4
>;
};
@ -181,49 +323,66 @@
pinctrl_can2: can2grp {
fsl,pins = <
MX53_PAD_KEY_COL4__CAN2_TXCAN 0x1c4
MX53_PAD_KEY_COL4__CAN2_TXCAN 0x1e4
MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x1c4
>;
};
pinctrl_display_gpio: display-gpiogrp {
fsl,pins = <
MX53_PAD_CSI0_DAT12__GPIO5_30 0x1d5 /* Reset */
MX53_PAD_CSI0_DAT13__GPIO5_31 0x1d5 /* Interrupt */
MX53_PAD_CSI0_DAT12__GPIO5_30 0x1c4 /* Reset */
MX53_PAD_CSI0_MCLK__GPIO5_19 0x1e4 /* Int-K */
MX53_PAD_CSI0_DAT13__GPIO5_31 0x1c4 /* Int-I */
MX53_PAD_CSI0_DAT14__GPIO6_0 0x1c4 /* Power down */
>;
};
pinctrl_edt_ft5x06: edt-ft5x06grp {
fsl,pins = <
MX53_PAD_PATA_DATA9__GPIO2_9 0x1d5 /* Reset */
MX53_PAD_CSI0_DAT19__GPIO6_5 0x1d5 /* Interrupt */
MX53_PAD_PATA_DATA10__GPIO2_10 0x1d5 /* Wake */
MX53_PAD_PATA_DATA9__GPIO2_9 0x1e4 /* Reset */
MX53_PAD_CSI0_DAT19__GPIO6_5 0x1c4 /* Interrupt */
MX53_PAD_PATA_DATA10__GPIO2_10 0x1e4 /* Wake */
>;
};
pinctrl_ecspi2: ecspi2grp {
fsl,pins = <
MX53_PAD_EIM_CS0__ECSPI2_SCLK 0xe4
MX53_PAD_EIM_OE__ECSPI2_MISO 0xe4
MX53_PAD_EIM_CS1__ECSPI2_MOSI 0xe4
MX53_PAD_EIM_RW__GPIO2_26 0xe4
MX53_PAD_EIM_LBA__GPIO2_27 0xe4
>;
};
pinctrl_esdhc1: esdhc1grp {
fsl,pins = <
MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1e4
MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1e4
MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1e4
MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1e4
MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1e4
MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1e4
MX53_PAD_GPIO_1__GPIO1_1 0x1c4
MX53_PAD_GPIO_9__GPIO1_9 0x1e4
>;
};
pinctrl_fec: fecgrp {
fsl,pins = <
MX53_PAD_FEC_MDC__FEC_MDC 0x4
MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc
MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180
MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180
MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180
MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180
MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180
MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4
MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4
MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4
MX53_PAD_FEC_MDC__FEC_MDC 0x1e4
MX53_PAD_FEC_MDIO__FEC_MDIO 0x1e4
MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x1e4
MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x1e4
MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x1e4
MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x1e4
MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x1e4
MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x1c4
MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x1e4
MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x1e4
MX53_PAD_PATA_DA_1__GPIO7_7 0x1e4
MX53_PAD_EIM_EB3__GPIO2_31 0x1e4
>;
};
@ -252,10 +411,24 @@
>;
};
pinctrl_power_button: powerbutgrp {
fsl,pins = <
MX53_PAD_SD2_DATA0__GPIO1_15 0x1e4
>;
};
pinctrl_power_out: poweroutgrp {
fsl,pins = <
MX53_PAD_SD2_DATA2__GPIO1_13 0x1e4
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
MX53_PAD_PATA_IORDY__UART1_RTS 0x1e4
MX53_PAD_PATA_RESET_B__UART1_CTS 0x1e4
>;
};
@ -263,13 +436,25 @@
fsl,pins = <
MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
MX53_PAD_PATA_DIOR__UART2_RTS 0x1e4
MX53_PAD_PATA_INTRQ__UART2_CTS 0x1e4
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
>;
};
pinctrl_usb: usbgrp {
fsl,pins = <
MX53_PAD_GPIO_2__GPIO1_2 0x1d5
MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x1d5
MX53_PAD_GPIO_2__GPIO1_2 0x1c4
MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x1c4
MX53_PAD_GPIO_4__GPIO1_4 0x1c4
MX53_PAD_GPIO_18__GPIO7_13 0x1c4
>;
};
};
@ -290,7 +475,7 @@
reg = <2>;
lvds0_out: endpoint {
remote-endpoint = <&panel_in>;
remote-endpoint = <&lvds_decoder_in>;
};
};
};
@ -299,12 +484,21 @@
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
uart-has-rtscts;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
uart-has-rtscts;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
linux,rs485-enabled-at-boot-time;
status = "okay";
};
@ -313,7 +507,7 @@
pinctrl-0 = <&pinctrl_usb>;
vbus-supply = <&reg_usbh1_vbus>;
phy_type = "utmi";
dr_mode = "peripheral";
dr_mode = "host";
status = "okay";
};

11
arch/arm/dts/imx53-pinfunc.h
View File

@ -1,16 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#ifndef __DTS_IMX53_PINFUNC_H
#define __DTS_IMX53_PINFUNC_H
#define IMX_PAD_SION 0x40000000
/*
* The pin function ID is a tuple of
* <mux_reg conf_reg input_reg mux_mode input_val>
@ -525,6 +520,7 @@
#define MX53_PAD_EIM_D25__UART1_DSR 0x140 0x488 0x000 0x7 0x0
#define MX53_PAD_EIM_D26__EMI_WEIM_D_26 0x144 0x48c 0x000 0x0 0x0
#define MX53_PAD_EIM_D26__GPIO3_26 0x144 0x48c 0x000 0x1 0x0
#define MX53_PAD_EIM_D26__UART2_RXD_MUX 0x144 0x48c 0x880 0x2 0x0
#define MX53_PAD_EIM_D26__UART2_TXD_MUX 0x144 0x48c 0x000 0x2 0x0
#define MX53_PAD_EIM_D26__FIRI_RXD 0x144 0x48c 0x80c 0x3 0x0
#define MX53_PAD_EIM_D26__IPU_CSI0_D_1 0x144 0x48c 0x000 0x4 0x0
@ -534,6 +530,7 @@
#define MX53_PAD_EIM_D27__EMI_WEIM_D_27 0x148 0x490 0x000 0x0 0x0
#define MX53_PAD_EIM_D27__GPIO3_27 0x148 0x490 0x000 0x1 0x0
#define MX53_PAD_EIM_D27__UART2_RXD_MUX 0x148 0x490 0x880 0x2 0x1
#define MX53_PAD_EIM_D27__UART2_TXD_MUX 0x148 0x490 0x000 0x2 0x0
#define MX53_PAD_EIM_D27__FIRI_TXD 0x148 0x490 0x000 0x3 0x0
#define MX53_PAD_EIM_D27__IPU_CSI0_D_0 0x148 0x490 0x000 0x4 0x0
#define MX53_PAD_EIM_D27__IPU_DI1_PIN13 0x148 0x490 0x000 0x5 0x0
@ -542,6 +539,7 @@
#define MX53_PAD_EIM_D28__EMI_WEIM_D_28 0x14c 0x494 0x000 0x0 0x0
#define MX53_PAD_EIM_D28__GPIO3_28 0x14c 0x494 0x000 0x1 0x0
#define MX53_PAD_EIM_D28__UART2_CTS 0x14c 0x494 0x000 0x2 0x0
#define MX53_PAD_EIM_D28__UART2_RTS 0x14c 0x494 0x87c 0x2 0x0
#define MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO 0x14c 0x494 0x82c 0x3 0x1
#define MX53_PAD_EIM_D28__CSPI_MOSI 0x14c 0x494 0x788 0x4 0x1
#define MX53_PAD_EIM_D28__I2C1_SDA 0x14c 0x494 0x818 0x5 0x1
@ -549,6 +547,7 @@
#define MX53_PAD_EIM_D28__IPU_DI0_PIN13 0x14c 0x494 0x000 0x7 0x0
#define MX53_PAD_EIM_D29__EMI_WEIM_D_29 0x150 0x498 0x000 0x0 0x0
#define MX53_PAD_EIM_D29__GPIO3_29 0x150 0x498 0x000 0x1 0x0
#define MX53_PAD_EIM_D29__UART2_CTS 0x150 0x498 0x000 0x2 0x0
#define MX53_PAD_EIM_D29__UART2_RTS 0x150 0x498 0x87c 0x2 0x1
#define MX53_PAD_EIM_D29__IPU_DISPB0_SER_RS 0x150 0x498 0x000 0x3 0x0
#define MX53_PAD_EIM_D29__CSPI_SS0 0x150 0x498 0x78c 0x4 0x2

87
arch/arm/dts/imx53-ppd.dts
View File

@ -1,4 +1,3 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2014 General Electric Company
*
@ -71,6 +70,12 @@
clock-frequency = <11289600>;
};
achc_24M: achc-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
sgtlsound: sound {
compatible = "fsl,imx53-cpuvo-sgtl5000",
"fsl,imx-audio-sgtl5000";
@ -177,15 +182,42 @@
power-supply = <&reg_3v3_lcd>;
};
leds {
led-controller-1 {
compatible = "pwm-leds";
alarm-brightness {
led-1 {
label = "alarm-brightness";
pwms = <&pwm1 0 100000>;
max-brightness = <255>;
};
};
led-controller-2 {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_alarmled_pins>;
led-2 {
label = "alarm:red";
gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
};
led-3 {
label = "alarm:yellow";
gpios = <&gpio7 7 GPIO_ACTIVE_HIGH>;
};
led-4 {
label = "alarm:blue";
gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
};
led-5 {
label = "alarm:silenced";
gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>;
};
};
gpio-poweroff {
compatible = "gpio-poweroff";
gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
@ -288,16 +320,13 @@
&gpio4 12 GPIO_ACTIVE_LOW>;
status = "okay";
spidev0: spi@0 {
compatible = "ge,achc";
reg = <0>;
spi-max-frequency = <1000000>;
};
spidev1: spi@1 {
compatible = "ge,achc";
reg = <1>;
spi-max-frequency = <1000000>;
spidev0: spi@1 {
compatible = "ge,achc", "nxp,kinetis-k20";
reg = <1>, <0>;
vdd-supply = <&reg_3v3>;
vdda-supply = <&reg_3v3>;
clocks = <&achc_24M>;
reset-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
};
gpioxra0: gpio@2 {
@ -439,7 +468,6 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc3>;
bus-width = <8>;
non-removable;
status = "okay";
};
@ -489,7 +517,7 @@
reg = <1>;
rtc@30 {
compatible = "sii,s35392a-rtc";
compatible = "sii,s35390a";
reg = <0x30>;
};
@ -565,7 +593,7 @@
touchscreen@4b {
compatible = "atmel,maxtouch";
reset-gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
reset-gpio = <&gpio5 19 GPIO_ACTIVE_LOW>;
reg = <0x4b>;
interrupt-parent = <&gpio5>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
@ -600,12 +628,14 @@
};
&pwm1 {
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&pwm2 {
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm2>;
status = "okay";
@ -624,6 +654,7 @@
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
fsl,dma-info = <24 20>;
status = "okay";
};
@ -643,6 +674,7 @@
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
fsl,dma-info = <4096 4>;
status = "okay";
};
@ -911,18 +943,10 @@
MX53_PAD_NANDF_CS3__GPIO6_16 0x0
/* POWER_AND_BOOT_STATUS_INDICATOR */
MX53_PAD_PATA_INTRQ__GPIO7_2 0x1e4
/* ACTIVATE_ALARM_LIGHT_RED */
MX53_PAD_PATA_DIOR__GPIO7_3 0x0
/* ACTIVATE_ALARM_LIGHT_YELLOW */
MX53_PAD_PATA_DA_1__GPIO7_7 0x0
/* ACTIVATE_ALARM_LIGHT_CYAN */
MX53_PAD_PATA_DA_2__GPIO7_8 0x0
/* RUNNING_ON_BATTERY_INDICATOR_GREEN */
MX53_PAD_GPIO_16__GPIO7_11 0x0
/* BATTERY_STATUS_INDICATOR_AMBER */
MX53_PAD_GPIO_17__GPIO7_12 0x0
/* AUDIO_ALARMS_SILENCED_INDICATOR */
MX53_PAD_GPIO_18__GPIO7_13 0x0
>;
};
@ -1082,6 +1106,17 @@
MX53_PAD_KEY_COL4__USBOH3_USBOTG_OC 0x180
>;
};
};
#include "imx53-ppd-uboot.dtsi"
pinctrl_alarmled_pins: qmx6alarmledgrp {
fsl,pins = <
/* ACTIVATE_ALARM_LIGHT_RED */
MX53_PAD_PATA_DIOR__GPIO7_3 0x0
/* ACTIVATE_ALARM_LIGHT_YELLOW */
MX53_PAD_PATA_DA_1__GPIO7_7 0x0
/* ACTIVATE_ALARM_LIGHT_CYAN */
MX53_PAD_PATA_DA_2__GPIO7_8 0x0
/* AUDIO_ALARMS_SILENCED_INDICATOR */
MX53_PAD_GPIO_18__GPIO7_13 0x0
>;
};
};

1
arch/arm/dts/imx53-usbarmory.dts
View File

@ -91,7 +91,6 @@
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
broken-cd;
status = "okay";
};

39
arch/arm/dts/imx53.dtsi
View File

@ -86,25 +86,25 @@
clocks {
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
ckih1 {
compatible = "fsl,imx-ckih1", "fixed-clock";
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <22579200>;
};
ckih2 {
compatible = "fsl,imx-ckih2", "fixed-clock";
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
osc {
compatible = "fsl,imx-osc", "fixed-clock";
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
@ -132,7 +132,7 @@
status = "okay";
};
soc {
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
@ -222,21 +222,21 @@
clock-names = "core_clk", "mem_iface_clk";
};
bus@50000000 { /* AIPS1 */
aips1: bus@50000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x50000000 0x10000000>;
ranges;
spba@50000000 {
spba-bus@50000000 {
compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x50000000 0x40000>;
ranges;
esdhc1: esdhc@50004000 {
esdhc1: mmc@50004000 {
compatible = "fsl,imx53-esdhc";
reg = <0x50004000 0x4000>;
interrupts = <1>;
@ -248,7 +248,7 @@
status = "disabled";
};
esdhc2: esdhc@50008000 {
esdhc2: mmc@50008000 {
compatible = "fsl,imx53-esdhc";
reg = <0x50008000 0x4000>;
interrupts = <2>;
@ -301,7 +301,7 @@
status = "disabled";
};
esdhc3: esdhc@50020000 {
esdhc3: mmc@50020000 {
compatible = "fsl,imx53-esdhc";
reg = <0x50020000 0x4000>;
interrupts = <3>;
@ -313,7 +313,7 @@
status = "disabled";
};
esdhc4: esdhc@50024000 {
esdhc4: mmc@50024000 {
compatible = "fsl,imx53-esdhc";
reg = <0x50024000 0x4000>;
interrupts = <4>;
@ -427,14 +427,14 @@
status = "disabled";
};
wdog1: wdog@53f98000 {
wdog1: watchdog@53f98000 {
compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
reg = <0x53f98000 0x4000>;
interrupts = <58>;
clocks = <&clks IMX5_CLK_DUMMY>;
};
wdog2: wdog@53f9c000 {
wdog2: watchdog@53f9c000 {
compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
reg = <0x53f9c000 0x4000>;
interrupts = <59>;
@ -525,7 +525,7 @@
};
pwm1: pwm@53fb4000 {
#pwm-cells = <2>;
#pwm-cells = <3>;
compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
reg = <0x53fb4000 0x4000>;
clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
@ -535,7 +535,7 @@
};
pwm2: pwm@53fb8000 {
#pwm-cells = <2>;
#pwm-cells = <3>;
compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
reg = <0x53fb8000 0x4000>;
clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>,
@ -588,9 +588,10 @@
status = "disabled";
};
src: src@53fd0000 {
src: reset-controller@53fd0000 {
compatible = "fsl,imx53-src", "fsl,imx51-src";
reg = <0x53fd0000 0x4000>;
interrupts = <75>;
#reset-cells = <1>;
};
@ -654,7 +655,7 @@
};
};
bus@60000000 { /* AIPS2 */
aips2: bus@60000000 { /* AIPS2 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@ -666,8 +667,8 @@
reg = <0x63f00000 0x60>;
};
iim: iim@63f98000 {
compatible = "fsl,imx53-iim", "fsl,imx27-iim";
iim: efuse@63f98000 {
compatible = "fsl,imx53-iim", "fsl,imx27-iim", "syscon";
reg = <0x63f98000 0x4000>;
interrupts = <69>;
clocks = <&clks IMX5_CLK_IIM_GATE>;