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mips: mtmips: add two reference boards for mt7621

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The mt7621_rfb board supports integrated giga PHYs plus one external
giga PHYs. It also has up to 512MiB DDR3, 16MB SPI-NOR, 3 mini PCI-e x1
slots, SDXC and USB.

The mt7621_nand_rfb board is almost the same as mt7621_rfb board, but it
uses NAND flash and SDXC is not available.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This commit is contained in:
Weijie Gao
2022-05-20 11:22:26 +08:00
committed by Daniel Schwierzeck
parent 4bc0104c97
commit 0eaee027f7
9 changed files with 363 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/mips/dts/Makefile
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@@ -16,6 +16,8 @@ dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += comtrend,wap-5813n.dtb
dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
dtb-$(CONFIG_BOARD_MT7620_RFB) += mediatek,mt7620-rfb.dtb
dtb-$(CONFIG_BOARD_MT7620_MT7530_RFB) += mediatek,mt7620-mt7530-rfb.dtb
dtb-$(CONFIG_BOARD_MT7621_RFB) += mediatek,mt7621-rfb.dtb
dtb-$(CONFIG_BOARD_MT7621_NAND_RFB) += mediatek,mt7621-nand-rfb.dtb
dtb-$(CONFIG_BOARD_MT7628_RFB) += mediatek,mt7628-rfb.dtb
dtb-$(CONFIG_BOARD_GARDENA_SMART_GATEWAY_MT7688) += gardena-smart-gateway-mt7688.dtb
dtb-$(CONFIG_BOARD_LINKIT_SMART_7688) += linkit-smart-7688.dtb

67
arch/mips/dts/mediatek,mt7621-nand-rfb.dts Normal file
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@@ -0,0 +1,67 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2022 MediaTek Inc. All rights reserved.
*
* Author: Weijie Gao <weijie.gao@mediatek.com>
*/
/dts-v1/;
#include "mt7621.dtsi"
/ {
compatible = "mediatek,mt7621-nand-rfb", "mediatek,mt7621-soc";
model = "MediaTek MT7621 RFB (NAND)";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = &uart0;
};
};
&pinctrl {
state_default: pin_state {
nand {
groups = "spi", "sdxc";
function = "nand";
};
gpios {
groups = "i2c", "uart3", "pcie reset";
function = "gpio";
};
wdt {
groups = "wdt";
function = "wdt rst";
};
jtag {
groups = "jtag";
function = "jtag";
};
};
};
&uart0 {
status = "okay";
};
&gpio {
status = "okay";
};
&eth {
status = "okay";
};
&ssusb {
status = "okay";
};
&u3phy {
status = "okay";
};

82
arch/mips/dts/mediatek,mt7621-rfb.dts Normal file
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@@ -0,0 +1,82 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2022 MediaTek Inc. All rights reserved.
*
* Author: Weijie Gao <weijie.gao@mediatek.com>
*/
/dts-v1/;
#include "mt7621.dtsi"
/ {
compatible = "mediatek,mt7621-rfb", "mediatek,mt7621-soc";
model = "MediaTek MT7621 RFB (SPI-NOR)";
aliases {
serial0 = &uart0;
spi0 = &spi;
};
chosen {
stdout-path = &uart0;
};
};
&pinctrl {
state_default: pin_state {
gpios {
groups = "i2c", "uart3", "pcie reset";
function = "gpio";
};
wdt {
groups = "wdt";
function = "wdt rst";
};
jtag {
groups = "jtag";
function = "jtag";
};
};
};
&uart0 {
status = "okay";
};
&gpio {
status = "okay";
};
&spi {
status = "okay";
num-cs = <2>;
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <25000000>;
reg = <0>;
};
};
&eth {
status = "okay";
};
&mmc {
cap-sd-highspeed;
status = "okay";
};
&ssusb {
status = "okay";
};
&u3phy {
status = "okay";
};

20
arch/mips/mach-mtmips/mt7621/Kconfig
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@@ -79,6 +79,26 @@ config MT7621_BOOT_FROM_NAND
choice
prompt "Board select"
config BOARD_MT7621_RFB
bool "MediaTek MT7621 RFB (SPI-NOR)"
help
The reference design of MT7621A (WS3010) booting from SPI-NOR flash.
The board can be configured with DDR2 (64MiB~256MiB) or DDR3
(128MiB~512MiB). The board has 16 MiB SPI-NOR flash, built-in MT7530
GbE switch, 1 UART, 1 USB 2.0 host, 1 USB 3.0 host, 1 SDXC, 3 PCIe
sockets, 1 RGMII to external GbE PHY, 2 audio jacks (in/out),
JTAG pins and expansion GPIO pins.
config BOARD_MT7621_NAND_RFB
bool "MediaTek MT7621 RFB (NAND)"
help
The reference design of MT7621A (WS3010) booting from NAND flash.
The board can be configured with DDR2 (64MiB~256MiB) or DDR3
(128MiB~512MiB). The board has 128 MiB parallel NAND flash, built-in
MT7530 GbE switch, 1 UART, 1 USB 2.0 host, 1 USB 3.0 host, 3 PCIe
sockets, 1 RGMII to external GbE PHY, 2 audio jacks (in/out),
JTAG pins and expansion GPIO pins.
endchoice
config SYS_CONFIG_NAME