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board: gateworks: gw_ventana: add support for GPY111 PHY

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The MaxLinear GPY111 PHY is being used on some boards due to part
availability. Add support for this PHY which requires a longer reset
post-delay and RGMII delay configuration.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
This commit is contained in:
Tim Harvey 2022-04-29 13:51:02 -07:00 committed by Stefano Babic
parent 6fc639461b
commit 0cba71c1eb
12 changed files with 32 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/dts/imx6qdl-gw51xx.dtsi
View File

@ -130,7 +130,7 @@
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
phy-reset-duration = <10>;
phy-reset-post-delay = <100>;
phy-reset-post-delay = <300>;
status = "okay";
};

2
arch/arm/dts/imx6qdl-gw52xx.dtsi
View File

@ -196,7 +196,7 @@
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
phy-reset-duration = <10>;
phy-reset-post-delay = <100>;
phy-reset-post-delay = <300>;
status = "okay";
};

2
arch/arm/dts/imx6qdl-gw53xx.dtsi
View File

@ -190,7 +190,7 @@
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
phy-reset-duration = <10>;
phy-reset-post-delay = <100>;
phy-reset-post-delay = <300>;
status = "okay";
};

2
arch/arm/dts/imx6qdl-gw54xx.dtsi
View File

@ -227,7 +227,7 @@
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
phy-reset-duration = <10>;
phy-reset-post-delay = <100>;
phy-reset-post-delay = <300>;
status = "okay";
};

2
arch/arm/dts/imx6qdl-gw560x.dtsi
View File

@ -281,7 +281,7 @@
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
phy-reset-duration = <10>;
phy-reset-post-delay = <100>;
phy-reset-post-delay = <300>;
status = "okay";
};

2
arch/arm/dts/imx6qdl-gw5903.dtsi
View File

@ -225,7 +225,7 @@
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
phy-reset-duration = <10>;
phy-reset-post-delay = <100>;
phy-reset-post-delay = <300>;
status = "okay";
};

2
arch/arm/dts/imx6qdl-gw5904.dtsi
View File

@ -203,7 +203,7 @@
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
phy-reset-duration = <10>;
phy-reset-post-delay = <100>;
phy-reset-post-delay = <300>;
status = "okay";
fixed-link {

2
arch/arm/dts/imx6qdl-gw5907.dtsi
View File

@ -132,7 +132,7 @@
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
phy-reset-duration = <10>;
phy-reset-post-delay = <100>;
phy-reset-post-delay = <300>;
status = "okay";
};

2
arch/arm/dts/imx6qdl-gw5910.dtsi
View File

@ -148,7 +148,7 @@
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
phy-reset-duration = <10>;
phy-reset-post-delay = <100>;
phy-reset-post-delay = <300>;
status = "okay";
};

2
arch/arm/dts/imx6qdl-gw5912.dtsi
View File

@ -144,7 +144,7 @@
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
phy-reset-duration = <10>;
phy-reset-post-delay = <100>;
phy-reset-post-delay = <300>;
status = "okay";
};

2
arch/arm/dts/imx6qdl-gw5913.dtsi
View File

@ -123,7 +123,7 @@
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
phy-reset-duration = <10>;
phy-reset-post-delay = <100>;
phy-reset-post-delay = <300>;
status = "okay";
};

27
board/gateworks/gw_ventana/gw_ventana.c
View File

@ -32,9 +32,10 @@ DECLARE_GLOBAL_DATA_PTR;
int board_phy_config(struct phy_device *phydev)
{
unsigned short val;
ofnode node;
/* Marvel 88E1510 */
if (phydev->phy_id == 0x1410dd1) {
switch (phydev->phy_id) {
case 0x1410dd1:
puts("MV88E1510");
/*
* Page 3, Register 16: LED[2:0] Function Control Register
@ -47,10 +48,8 @@ int board_phy_config(struct phy_device *phydev)
val |= 0x0017;
phy_write(phydev, MDIO_DEVAD_NONE, 16, val);
phy_write(phydev, MDIO_DEVAD_NONE, 22, 0);
}
/* TI DP83867 */
else if (phydev->phy_id == 0x2000a231) {
break;
case 0x2000a231:
puts("TIDP83867 ");
/* LED configuration */
val = 0;
@ -66,6 +65,22 @@ int board_phy_config(struct phy_device *phydev)
val &= ~0x1f00;
val |= 0x0b00; /* chD tx clock*/
phy_write(phydev, MDIO_DEVAD_NONE, 14, val);
break;
case 0xd565a401:
puts("GPY111 ");
node = phy_get_ofnode(phydev);
if (ofnode_valid(node)) {
u32 rx_delay, tx_delay;
rx_delay = ofnode_read_u32_default(node, "rx-internal-delay-ps", 2000);
tx_delay = ofnode_read_u32_default(node, "tx-internal-delay-ps", 2000);
val = phy_read(phydev, MDIO_DEVAD_NONE, 0x17);
val &= ~((0x7 << 12) | (0x7 << 8));
val |= (rx_delay / 500) << 12;
val |= (tx_delay / 500) << 8;
phy_write(phydev, MDIO_DEVAD_NONE, 0x17, val);
}
break;
}
if (phydev->drv->config)