x86: tangier: Reserve PCI ECAM in motherboard resources

Per PCI firmware specification the ACPI has to reserve the memory
which is defined as PCI ECAM.

Fixes: 39665beed6 ("x86: tangier: Enable ACPI support for Intel Tangier")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

arch/x86/cpu/tangier/acpi.c

@@ -14,6 +14,7 @@
 #include <asm/mpspec.h>
 #include <asm/tables.h>
 #include <asm/arch/global_nvs.h>
+#include <asm/arch/iomap.h>
 
 void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
 		      void *dsdt)
@@ -63,7 +64,7 @@ u32 acpi_fill_mcfg(u32 current)
 	/* TODO: Derive parameters from SFI MCFG table */
 	current += acpi_create_mcfg_mmconfig
 		((struct acpi_mcfg_mmconfig *)current,
-		0x3f500000, 0x0, 0x0, 0x0);
+		MCFG_BASE_ADDRESS, 0x0, 0x0, 0x0);
 
 	return current;
 }

arch/x86/include/asm/arch-tangier/acpi/platform.asl

@@ -6,6 +6,7 @@
  */
 
 #include <asm/acpi/statdef.asl>
+#include <asm/arch/iomap.h>
 
 /*
  * The _PTS method (Prepare To Sleep) is called before the OS is

arch/x86/include/asm/arch-tangier/acpi/southcluster.asl

@@ -66,6 +66,23 @@ Device (PCI0)
         Return (MCRS)
     }
 
+    /* Device Resource Consumption */
+    Device (PDRC)
+    {
+        Name (_HID, EISAID("PNP0C02"))
+        Name (_UID, One)
+
+        Name (PDRS, ResourceTemplate()
+        {
+            Memory32Fixed(ReadWrite, MCFG_BASE_ADDRESS, MCFG_BASE_SIZE)
+        })
+
+        Method (_CRS, 0, Serialized)
+        {
+            Return (PDRS)
+        }
+    }
+
     Method (_OSC, 4)
     {
         /* Check for proper GUID */

arch/x86/include/asm/arch-tangier/iomap.h

@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/* Copyright (c) 2019 Intel Corporation */
+
+#ifndef _TANGIER_IOMAP_H
+#define _TANGIER_IOMAP_H
+
+#define MCFG_BASE_ADDRESS	0x3f500000
+#define MCFG_BASE_SIZE		0x00100000
+
+#endif	/* _TANGIER_IOMAP_H */