arm: socfpga: move vining_fpga to DM_I2C

All socfpga boards except for vining_fpga use DM_I2C. Enable
DM_I2C for this board and set the EEPROM defines via Kconfig
(enabling CONFIG_I2C_EEPROM from MISC).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Series-changes: 2
- added (this) patch to move socfpga_vining to DM_I2C
This commit is contained in:
Simon Goldschmidt
2019-03-28 22:09:35 +01:00
committed by Marek Vasut
parent 9dc61aac2d
commit 0b7eb4337d
4 changed files with 8 additions and 44 deletions

View File

@@ -149,32 +149,6 @@
#define CONFIG_SYS_NAND_DATA_BASE SOCFPGA_NANDDATA_ADDRESS
#endif
/*
* I2C support
*/
#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_BASE SOCFPGA_I2C0_ADDRESS
#define CONFIG_SYS_I2C_BASE1 SOCFPGA_I2C1_ADDRESS
#define CONFIG_SYS_I2C_BASE2 SOCFPGA_I2C2_ADDRESS
#define CONFIG_SYS_I2C_BASE3 SOCFPGA_I2C3_ADDRESS
/* Using standard mode which the speed up to 100Kb/s */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SPEED1 100000
#define CONFIG_SYS_I2C_SPEED2 100000
#define CONFIG_SYS_I2C_SPEED3 100000
/* Address of device when used as slave */
#define CONFIG_SYS_I2C_SLAVE 0x02
#define CONFIG_SYS_I2C_SLAVE1 0x02
#define CONFIG_SYS_I2C_SLAVE2 0x02
#define CONFIG_SYS_I2C_SLAVE3 0x02
#ifndef __ASSEMBLY__
/* Clock supplied to I2C controller in unit of MHz */
unsigned int cm_get_l4_sp_clk_hz(void);
#define IC_CLK (cm_get_l4_sp_clk_hz() / 1000000)
#endif
#endif /* CONFIG_DM_I2C */
/*
* QSPI support
*/

View File

@@ -16,15 +16,6 @@
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* I2C EEPROM */
#ifdef CONFIG_CMD_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_BUS 0
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
#endif
/*
* Status LEDs:
* 0 ... Top Green