arm: socfpga: move vining_fpga to DM_I2C
All socfpga boards except for vining_fpga use DM_I2C. Enable DM_I2C for this board and set the EEPROM defines via Kconfig (enabling CONFIG_I2C_EEPROM from MISC). Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Series-changes: 2 - added (this) patch to move socfpga_vining to DM_I2C
This commit is contained in:
committed by
Marek Vasut
parent
9dc61aac2d
commit
0b7eb4337d
@@ -149,32 +149,6 @@
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#define CONFIG_SYS_NAND_DATA_BASE SOCFPGA_NANDDATA_ADDRESS
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#endif
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/*
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* I2C support
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*/
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#ifndef CONFIG_DM_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_BASE SOCFPGA_I2C0_ADDRESS
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#define CONFIG_SYS_I2C_BASE1 SOCFPGA_I2C1_ADDRESS
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#define CONFIG_SYS_I2C_BASE2 SOCFPGA_I2C2_ADDRESS
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#define CONFIG_SYS_I2C_BASE3 SOCFPGA_I2C3_ADDRESS
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/* Using standard mode which the speed up to 100Kb/s */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SPEED1 100000
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#define CONFIG_SYS_I2C_SPEED2 100000
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#define CONFIG_SYS_I2C_SPEED3 100000
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/* Address of device when used as slave */
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#define CONFIG_SYS_I2C_SLAVE 0x02
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#define CONFIG_SYS_I2C_SLAVE1 0x02
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#define CONFIG_SYS_I2C_SLAVE2 0x02
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#define CONFIG_SYS_I2C_SLAVE3 0x02
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#ifndef __ASSEMBLY__
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/* Clock supplied to I2C controller in unit of MHz */
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unsigned int cm_get_l4_sp_clk_hz(void);
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#define IC_CLK (cm_get_l4_sp_clk_hz() / 1000000)
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#endif
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#endif /* CONFIG_DM_I2C */
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/*
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* QSPI support
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*/
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@@ -16,15 +16,6 @@
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#define CONFIG_LOADADDR 0x01000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/* I2C EEPROM */
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#ifdef CONFIG_CMD_EEPROM
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_SYS_I2C_EEPROM_BUS 0
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
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#endif
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/*
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* Status LEDs:
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* 0 ... Top Green
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