watchdog: Add MAX6370 watchdog timer driver
MAX6370 watchdog is available e.g. on Freescale P1/P2 RDB-PC boards. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
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@ -168,6 +168,13 @@ config WDT_GPIO
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doc/device-tree-bindings/watchdog/gpio-wdt.txt for
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information on how to describe the watchdog in device tree.
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config WDT_MAX6370
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bool "MAX6370 watchdog timer support"
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depends on WDT
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select DM_GPIO
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help
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Select this to enable max6370 watchdog timer.
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config WDT_MPC8xx
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bool "MPC8xx watchdog timer support"
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depends on WDT && MPC8xx
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@ -26,6 +26,7 @@ obj-$(CONFIG_WDT_CORTINA) += cortina_wdt.o
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obj-$(CONFIG_WDT_ORION) += orion_wdt.o
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obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
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obj-$(CONFIG_WDT_GPIO) += gpio_wdt.o
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obj-$(CONFIG_WDT_MAX6370) += max6370_wdt.o
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obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
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obj-$(CONFIG_WDT_MT7620) += mt7620_wdt.o
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obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
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118
drivers/watchdog/max6370_wdt.c
Normal file
118
drivers/watchdog/max6370_wdt.c
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@ -0,0 +1,118 @@
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// SPDX-License-Identifier: GPL-2.0+
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// (C) 2022 Pali Rohár <pali@kernel.org>
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#include <asm/io.h>
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#include <asm-generic/gpio.h>
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#include <dm.h>
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#include <linux/delay.h>
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#include <wdt.h>
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#define MAX6370_SET_MASK 0x7
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#define MAX6370_SET_1MS 0x0
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#define MAX6370_SET_10MS 0x1
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#define MAX6370_SET_30MS 0x2
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#define MAX6370_SET_DISABLE 0x3
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#define MAX6370_SET_100MS 0x4
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#define MAX6370_SET_1S 0x5
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#define MAX6370_SET_10S 0x6
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#define MAX6370_SET_60S 0x7
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#define MAX6370_WDI 0x8
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struct max6370_wdt {
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void __iomem *reg;
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struct gpio_desc gpio_wdi;
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};
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static int max6370_wdt_start(struct udevice *dev, u64 ms, ulong flags)
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{
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struct max6370_wdt *wdt = dev_get_priv(dev);
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u8 val;
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val = readb(wdt->reg);
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val &= ~MAX6370_SET_MASK;
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if (ms <= 1)
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val |= MAX6370_SET_1MS;
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else if (ms <= 10)
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val |= MAX6370_SET_10MS;
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else if (ms <= 30)
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val |= MAX6370_SET_30MS;
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else if (ms <= 100)
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val |= MAX6370_SET_100MS;
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else if (ms <= 1000)
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val |= MAX6370_SET_1S;
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else if (ms <= 10000)
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val |= MAX6370_SET_10S;
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else
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val |= MAX6370_SET_60S;
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writeb(val, wdt->reg);
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return 0;
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}
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static int max6370_wdt_stop(struct udevice *dev)
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{
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struct max6370_wdt *wdt = dev_get_priv(dev);
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u8 val;
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val = readb(wdt->reg);
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val &= ~MAX6370_SET_MASK;
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val |= MAX6370_SET_DISABLE;
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writeb(val, wdt->reg);
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return 0;
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}
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static int max6370_wdt_reset(struct udevice *dev)
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{
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struct max6370_wdt *wdt = dev_get_priv(dev);
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u8 val;
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if (dm_gpio_is_valid(&wdt->gpio_wdi)) {
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dm_gpio_set_value(&wdt->gpio_wdi, 1);
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udelay(1);
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dm_gpio_set_value(&wdt->gpio_wdi, 0);
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} else {
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val = readb(wdt->reg);
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writeb(val | MAX6370_WDI, wdt->reg);
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writeb(val & ~MAX6370_WDI, wdt->reg);
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}
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return 0;
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}
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static int max6370_wdt_probe(struct udevice *dev)
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{
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struct max6370_wdt *wdt = dev_get_priv(dev);
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wdt->reg = dev_read_addr_ptr(dev);
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if (!wdt->reg)
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return -EINVAL;
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/* WDI gpio is optional */
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gpio_request_by_name(dev, "gpios", 0, &wdt->gpio_wdi, GPIOD_IS_OUT);
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return 0;
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}
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static const struct wdt_ops max6370_wdt_ops = {
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.start = max6370_wdt_start,
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.stop = max6370_wdt_stop,
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.reset = max6370_wdt_reset,
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};
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static const struct udevice_id max6370_wdt_ids[] = {
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{ .compatible = "maxim,max6370" },
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{}
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};
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U_BOOT_DRIVER(max6370_wdt) = {
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.name = "max6370_wdt",
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.id = UCLASS_WDT,
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.of_match = max6370_wdt_ids,
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.probe = max6370_wdt_probe,
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.priv_auto = sizeof(struct max6370_wdt),
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.ops = &max6370_wdt_ops,
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};
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