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Add support for eTSEC 3 & 4 on 8548 CDS

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* Added support for using eTSEC 3 and eTSEC 4 on the 8548 CDS.
  This will only work on rev 1.3 boards (but doesn't break older boards)
* Cleaned up some comments to reflect the expanded role of tsec
  in other systems
This commit is contained in:
Andy Fleming
2006-09-13 10:34:18 -05:00
committed by Jon Loeliger
parent 084d648b10
commit 09f3e09e9e
4 changed files with 111 additions and 11 deletions
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32
board/cds/mpc8548cds/mpc8548cds.c
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@@ -27,6 +27,7 @@
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <spd.h>
#include <miiphy.h>
#include "../common/cadmus.h"
#include "../common/eeprom.h"
@@ -327,3 +328,34 @@ pci_init_board(void)
pci_mpc85xx_init(&hose);
#endif
}
int last_stage_init(void)
{
unsigned int temp;
/* Change the resistors for the PHY */
/* This is needed to get the RGMII working for the 1.3+
* CDS cards */
if (get_board_version() == 0x13) {
miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
TSEC1_PHY_ADDR, 29, 18);
miiphy_read(CONFIG_MPC85XX_TSEC1_NAME,
TSEC1_PHY_ADDR, 30, &temp);
temp = (temp & 0xf03f);
temp |= 2 << 9; /* 36 ohm */
temp |= 2 << 6; /* 39 ohm */
miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
TSEC1_PHY_ADDR, 30, temp);
miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
TSEC1_PHY_ADDR, 29, 3);
miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
TSEC1_PHY_ADDR, 30, 0x8000);
}
return 0;
}