armv8: ls1088ardb: Add SD boot support for ls1088
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Ashish Kumar
York Sun
parent
f65425fb46
commit
099f4093a5
@ -931,6 +931,7 @@ config TARGET_LS1088ARDB
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select ARMV8_MULTIENTRY
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select ARCH_MISC_INIT
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select BOARD_LATE_INIT
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select SUPPORT_SPL
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help
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Support for NXP LS1088ARDB platform.
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The LS1088A Reference design board (RDB) is a high-performance
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@ -201,6 +201,50 @@ nand write <u-boot image in memory> 80000 <size of u-boot image>
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Notice the difference from QDS is SRC, SRC_ADDR and the offset of u-boot image
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to match board NAND device with 4KB/page, block size 512KB.
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Booting from SD/eMMC
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-------------------
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Booting from SD/eMMC requires two images, RCW and u-boot-with-spl.bin.
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The difference between SD boot RCW image and QSPI-NOR boot image is the
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PBI command sequence. Below is one example for PBI commands for RDB
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and QDS which uses SD device with block size 512. Block location can be
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calculated by dividing offset with block size.
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1) Block Copy: SRC=0x0040, SRC_ADDR=0x00100000, DEST_ADDR=0x1800a000,
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BLOCK_SIZE=0x00016000
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This command copies u-boot image from SD device into OCRAM. The values
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need to adjust accordingly for SD/eMMC
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SRC should match the cfg_rcw_src, the reset config pins.
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The value for source(SRC) can be 0x0040 or 0x0041
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depending upon SD or eMMC.
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SRC_ADDR is the offset of u-boot-with-spl.bin image in SD device.
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In the example above, 1MB. This is same as QSPI-NOR.
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DEST_ADDR is configured at 0x1800a000, matching bootloc set above.
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BLOCK_SIZE is the size to be copied by PBI.
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2) CCSR 4-byte write to 0x01e00404, data=0x00000000
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3) CCSR 4-byte write to 0x01e00400, data=0x1800a000
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The above two commands set bootloc register to 0x00000000_1800a000 where
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the u-boot code will be running in OCRAM.
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RCW image should be written at 8th block of device(SD/eMMC). Example of
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using u-boot command
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mmc erase 0x8 0x10
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mmc write <rcw image in memory> 0x8 <size of rcw in block count typical value=10>
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To form the SD-Boot image, build u-boot with SD config, for example,
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ls1088ardb_sdcard_qspi_defconfig. The image needed is u-boot-with-spl.bin.
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The u-boot image should be written to match SRC_ADDR, in above example
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offset 0x100000 in other work it means block location 0x800
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mmc erase 0x800 0x1800
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mmc write <u-boot image in memory> 0x800 <size of u-boot image in block count>
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With these two images in SD/eMMC device, the board can boot from SD/eMMC.
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MMU Translation Tables
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======================
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@ -5,6 +5,7 @@ S: Maintained
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F: board/freescale/ls1088a/
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F: include/configs/ls1088ardb.h
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F: configs/ls1088ardb_qspi_defconfig
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F: configs/ls1088ardb_sdcard_qspi_defconfig
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LS1088AQDS BOARD
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M: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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@ -96,7 +96,10 @@ int fsl_initdram(void)
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{
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puts("Initializing DDR....using SPD\n");
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#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
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gd->ram_size = fsl_ddr_sdram_size();
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#else
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gd->ram_size = fsl_ddr_sdram();
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#endif
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return 0;
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}
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41
configs/ls1088ardb_sdcard_qspi_defconfig
Normal file
41
configs/ls1088ardb_sdcard_qspi_defconfig
Normal file
@ -0,0 +1,41 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS1088ARDB=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
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# CONFIG_SYS_MALLOC_F is not set
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_PARTITIONS=y
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CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI"
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CONFIG_SD_BOOT=y
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_SPL=y
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CONFIG_SPL_BUILD=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_PING=y
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_DM=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_NETDEVICES=y
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CONFIG_E1000=y
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CONFIG_SYS_NS16550=y
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CONFIG_DM_SPI=y
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CONFIG_FSL_DSPI=y
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@ -20,18 +20,24 @@
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
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/* Link Definitions */
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#ifdef CONFIG_SPL
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#define CONFIG_SYS_TEXT_BASE 0x80400000
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#else
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#ifdef CONFIG_QSPI_BOOT
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#define CONFIG_SYS_TEXT_BASE 0x20100000
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#else
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#define CONFIG_SYS_TEXT_BASE 0x30100000
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#endif
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#endif
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#define CONFIG_SUPPORT_RAW_INITRD
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#if !defined(CONFIG_SD_BOOT)
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#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */
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#endif
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#define CONFIG_VERY_BIG_RAM
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#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
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@ -200,6 +206,11 @@ unsigned long long get_qixis_addr(void);
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" fsl_mc apply dpl 0x80200000 &&" \
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" sf read $kernel_load $kernel_start" \
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" $kernel_size && bootm $kernel_load"
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#elif defined(CONFIG_SD_BOOT)
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#define CONFIG_BOOTCOMMAND "mmcinfo;mmc read 0x80200000 0x6800 0x800;"\
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" fsl_mc apply dpl 0x80200000 &&" \
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" mmc read $kernel_load $kernel_start" \
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" $kernel_size && bootm $kernel_load"
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#else /* NOR BOOT*/
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#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580d00000 &&" \
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" cp.b $kernel_start $kernel_load" \
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@ -219,6 +230,20 @@ unsigned long long get_qixis_addr(void);
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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#ifdef CONFIG_SPL
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#define CONFIG_SPL_BSS_START_ADDR 0x80100000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
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#define CONFIG_SPL_MAX_SIZE 0x16000
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#define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0)
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#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
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#define CONFIG_SPL_TEXT_BASE 0x1800a000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000
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#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#endif
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
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#endif /* __LS1088_COMMON_H */
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@ -15,6 +15,10 @@
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#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
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#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
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#define CONFIG_ENV_SECT_SIZE 0x40000
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#elif defined(CONFIG_SD_BOOT)
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#define CONFIG_ENV_OFFSET (3 * 1024 * 1024)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_ENV_SIZE 0x2000
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#else
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000)
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@ -22,9 +26,10 @@
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#define CONFIG_ENV_SIZE 0x20000
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#endif
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#if defined(CONFIG_QSPI_BOOT)
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#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
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#define CONFIG_QIXIS_I2C_ACCESS
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#define SYS_NO_FLASH
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#undef CONFIG_CMD_IMLS
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#endif
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#define CONFIG_SYS_CLK_FREQ 100000000
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@ -232,7 +237,7 @@
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
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/* QSPI device */
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#if defined(CONFIG_QSPI_BOOT)
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#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
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#define CONFIG_FSL_QSPI
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#define FSL_QSPI_FLASH_SIZE (1 << 26)
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#define FSL_QSPI_FLASH_NUM 2
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@ -243,7 +248,11 @@
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END 0x9fffffff
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
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#else
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#endif
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#define CONFIG_FSL_MEMAC
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@ -265,6 +274,23 @@
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"sf read 0x80100000 0xE00000 0x100000;" \
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"fsl_mc start mc 0x80000000 0x80100000\0" \
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"mcmemsize=0x70000000 \0"
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#elif defined(CONFIG_SD_BOOT)
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#undef CONFIG_EXTRA_ENV_SETTINGS
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"hwconfig=fsl_ddr:bank_intlv=auto\0" \
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"loadaddr=0x90100000\0" \
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"kernel_addr=0x800\0" \
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"ramdisk_addr=0x800000\0" \
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"ramdisk_size=0x2000000\0" \
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"fdt_high=0xa0000000\0" \
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"initrd_high=0xffffffffffffffff\0" \
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"kernel_start=0x8000\0" \
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"kernel_load=0xa0000000\0" \
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"kernel_size=0x14000\0" \
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"mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;" \
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"mmc read 0x80100000 0x7000 0x800;" \
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"fsl_mc start mc 0x80000000 0x80100000\0" \
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"mcmemsize=0x70000000 \0"
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#endif
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