Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
This commit is contained in:
Tom Rini
commit
0798082442
536
CREDITS
536
CREDITS
@ -1,536 +0,0 @@
|
||||
#
|
||||
# Parts of the development effort for this project have been
|
||||
# sponsored by SIEMENS AG, Austria. Thanks to SIEMENS for
|
||||
# supporting an Open Source project!
|
||||
#
|
||||
#
|
||||
# This is at least a partial credits-file of individual people that
|
||||
# have contributed to the U-Boot project. It is sorted by name and
|
||||
# formatted to allow easy grepping and beautification by scripts.
|
||||
# The fields are: name (N), email (E), web-address (W), PGP key ID
|
||||
# and fingerprint (P), description (D), and snail-mail address (S).
|
||||
# Thanks,
|
||||
#
|
||||
# Wolfgang Denk
|
||||
#----------
|
||||
|
||||
N: Dr. Bruno Achauer
|
||||
E: bruno@exet-ag.de
|
||||
D: Support for NetBSD (both as host and target system)
|
||||
|
||||
N: Guillaume Alexandre
|
||||
E: guillaume.alexandre@gespac.ch
|
||||
D: Add PCIPPC6 configuration
|
||||
|
||||
N: Pantelis Antoniou
|
||||
E: panto@intracom.gr
|
||||
D: NETVIA & NETPHONE board support, ARTOS support.
|
||||
D: Support for Silicon Turnkey eXpress XTc
|
||||
|
||||
N: Pierre Aubert
|
||||
E: <p.aubert@staubli.com>
|
||||
D: Support for RPXClassic board
|
||||
|
||||
N: Yuli Barcohen
|
||||
E: yuli@arabellasw.com
|
||||
D: Unified support for Motorola MPC826xADS/MPC8272ADS/PQ2FADS boards.
|
||||
D: Support for Zephyr Engineering ZPC.1900 board.
|
||||
D: Support for Interphase iSPAN boards.
|
||||
D: Support for Analogue&Micro Adder boards.
|
||||
D: Support for Analogue&Micro Rattler boards.
|
||||
W: http://www.arabellasw.com
|
||||
|
||||
N: Jerry van Baren
|
||||
E: <vanbaren@cideas.com>
|
||||
D: BedBug port to 603e core (MPC82xx). Code for enhanced memory test.
|
||||
|
||||
N: Pavel Bartusek
|
||||
E: <pba@sysgo.com>
|
||||
D: Reiserfs support
|
||||
W: http://www.elinos.com
|
||||
|
||||
N: Andre Beaudin
|
||||
E: <andre.beaudin@colubris.com>
|
||||
D: PCMCIA, Ethernet, TFTP
|
||||
|
||||
N: Jon Benediktsson
|
||||
E: jonb@marel.is
|
||||
D: Support for Marel V37 board
|
||||
|
||||
N: Raphael Bossek
|
||||
E: raphael.bossek@solutions4linux.de
|
||||
D: 8xxrom-0.3.0
|
||||
|
||||
N: Cliff Brake
|
||||
E: cliff.brake@gmail.com
|
||||
D: Port to Vibren PXA255 IDP platform
|
||||
W: http://www.vibren.com
|
||||
W: http://bec-systems.com
|
||||
|
||||
N: Rick Bronson
|
||||
E: rick@efn.org
|
||||
D: Atmel AT91RM9200DK and NAND support
|
||||
|
||||
N: David Brown
|
||||
E: DBrown03@harris.com
|
||||
D: Extensions to 8xxrom-0.3.0
|
||||
|
||||
N: Oliver Brown
|
||||
E: obrown@adventnetworks.com
|
||||
D: Port to the gw8260 board
|
||||
|
||||
N: Jonathan De Bruyne
|
||||
E: jonathan.debruyne@siemens.atea.be
|
||||
D: Port to Siemens IAD210 board
|
||||
|
||||
N: Ken Chou
|
||||
E: kchou@ieee.org
|
||||
D: Support for A3000 SBC board
|
||||
|
||||
N: Conn Clark
|
||||
E: clark@esteem.com
|
||||
D: ESTEEM192E support
|
||||
|
||||
N: Magnus Damm
|
||||
E: damm@opensource.se
|
||||
D: 8xxrom
|
||||
|
||||
N: Richard Danter
|
||||
E: richard.danter@windriver.com
|
||||
D: Support for Wind River PPMC 7xx/74xx boards
|
||||
|
||||
N: George G. Davis
|
||||
E: gdavis@mvista.com
|
||||
D: Board ports for ADS GraphicsClient+ and Intel Assabet
|
||||
|
||||
N: Arun Dharankar
|
||||
E: ADharankar@ATTBI.Com
|
||||
D: threads / scheduler example code
|
||||
|
||||
N: K?ri Dav??sson
|
||||
E: kd@flaga.is
|
||||
D: FLAGA DM Support
|
||||
|
||||
N: Wolfgang Denk
|
||||
E: wd@denx.de
|
||||
D: U-Boot initial version, continuing maintenance, ARMBoot merge
|
||||
W: http://www.denx.de
|
||||
|
||||
N: Dan A. Dickey
|
||||
E: ddickey@charter.net
|
||||
D: FADS Support
|
||||
|
||||
N: Mike Dunn
|
||||
E: mikedunn@newsguy.com
|
||||
D: Palmtreo680 board, docg4 nand flash driver
|
||||
|
||||
N: Dave Ellis
|
||||
E: DGE@sixnetio.com
|
||||
D: EEPROM Speedup
|
||||
|
||||
N: Daniel Engstr?m
|
||||
E: daniel@omicron.se
|
||||
D: x86 port, Support for sc520_cdp board
|
||||
|
||||
N: Hayden Fraser
|
||||
E: Hayden.Fraser@freescale.com
|
||||
D: Support for ColdFire MCF5253
|
||||
W: www.freescale.com
|
||||
|
||||
N: Dr. Wolfgang Grandegger
|
||||
E: wg@denx.de
|
||||
D: Support for Interphase 4539 T1/E1/J1 PMC, CCM, SCM boards
|
||||
W: www.denx.de
|
||||
|
||||
N: Peter Figuli
|
||||
E: peposh@etc.sk
|
||||
D: Support for WEP EP250 (PXA) board
|
||||
|
||||
N: Thomas Frieden
|
||||
E: ThomasF@hyperion-entertainment.com
|
||||
D: Support for AmigaOne
|
||||
|
||||
N: Paul Gortmaker
|
||||
E: paul.gortmaker@windriver.com
|
||||
D: Support for WRS SBC8347/8349 boards
|
||||
|
||||
N: Frank Gottschling
|
||||
E: fgottschling@eltec.de
|
||||
D: Support for ELTEC MHPC/ELPPC boards, cfb-console, i8042, SMI LynxEM
|
||||
W: www.eltec.de
|
||||
|
||||
N: Marius Groeger
|
||||
E: mgroeger@sysgo.de
|
||||
D: MBX Support, board specific function interface, EST SBC8260 support; initial support for StrongARM (LART), ARM720TDMI (implementa A7)
|
||||
W: www.elinos.com
|
||||
|
||||
N: Kirk Haderlie
|
||||
E: khaderlie@vividimage.com
|
||||
D: Added TFTP to 8xxrom (-> 0.3.1)
|
||||
|
||||
N: Chris Hallinan
|
||||
E: clh@net1plus.com
|
||||
D: DHCP Support
|
||||
|
||||
N: Anne-Sophie Harnois
|
||||
E: Anne-Sophie.Harnois@nextream.fr
|
||||
D: Port to Walnut405 board
|
||||
|
||||
N: Andreas Heppel
|
||||
E: aheppel@sysgo.de
|
||||
D: CPU Support for MPC 75x
|
||||
|
||||
N: Josh Huber
|
||||
E: huber@alum.wpi.edu
|
||||
D: Port to the Galileo Evaluation Board, and the MPC74xx cpu series.
|
||||
W: http://www.mclx.com/
|
||||
|
||||
H: Stuart Hughes
|
||||
E: stuarth@lineo.com
|
||||
D: Port to MPC8260ADS board
|
||||
|
||||
H: Rich Ireland
|
||||
E: r.ireland@computer.org
|
||||
D: FPGA device configuration driver
|
||||
|
||||
H: Mark Jackson
|
||||
E: mpfj@mimc.co.uk
|
||||
D: Port to MIMC200 board
|
||||
|
||||
N: Gary Jennejohn
|
||||
E: garyj@jennejohn.org
|
||||
D: Support for Samsung ARM920T S3C2400X, ARM920T "TRAB"
|
||||
W: www.denx.de
|
||||
|
||||
N: Murray Jensen
|
||||
E: Murray.Jensen@csiro.au
|
||||
D: Initial 8260 support; GDB support
|
||||
D: Port to Cogent+Hymod boards; Hymod Board Database
|
||||
|
||||
N: Yoo. Jonghoon
|
||||
E: yooth@ipone.co.kr
|
||||
D: Added port to the RPXlite board
|
||||
|
||||
N: Mark Jonas
|
||||
E: mark.jonas@freescale.com
|
||||
D: Support for Freescale Total5200 platform
|
||||
W: http://www.mobilegt.com/
|
||||
|
||||
N: Mark Jonas
|
||||
E: mark.jonas@de.bosch.com
|
||||
D: Support for MPR2 board
|
||||
|
||||
N: Sam Song
|
||||
E: samsongshu@yahoo.com.cn
|
||||
D: Port to the RPXlite_DW board
|
||||
|
||||
N: Brad Kemp
|
||||
E: Brad.Kemp@seranoa.com
|
||||
D: Port to Windriver ppmc8260 board
|
||||
|
||||
N: Sangmoon Kim
|
||||
E: dogoil@etinsys.com
|
||||
D: Support for debris board
|
||||
D: Support for KVME080 board
|
||||
|
||||
N: Frederick W. Klatt
|
||||
E: fred.klatt@windriver.com
|
||||
D: Support for Wind River SBC8540/SBC8560 boards
|
||||
|
||||
N: Thomas Koeller
|
||||
E: tkoeller@gmx.net
|
||||
D: Port to Motorola Sandpoint 3 (MPC8240)
|
||||
|
||||
N: Raghu Krishnaprasad
|
||||
E: Raghu.Krishnaprasad@fci.com
|
||||
D: Support for Adder-II MPC852T evaluation board
|
||||
W: http://www.forcecomputers.com
|
||||
|
||||
N: Sergey Kubushyn
|
||||
E: ksi@koi8.net
|
||||
D: Support for various TI DaVinci based boards.
|
||||
|
||||
N: Bernhard Kuhn
|
||||
E: bkuhn@metrowerks.com
|
||||
D Support for Coldfire CPU; Support for Motorola M5272C3 and M5282EVB boards
|
||||
|
||||
N: Prakash Kumar
|
||||
E: prakash@embedx.com
|
||||
D Support for Intrinsyc CERF PXA250 board.
|
||||
|
||||
N: Thomas Lange
|
||||
E: thomas@corelatus.se
|
||||
D: Support for GTH, GTH2 and dbau1x00 boards; lots of PCMCIA fixes
|
||||
|
||||
N: The LEOX team
|
||||
E: team@leox.org
|
||||
D: Support for LEOX boards, DS164x RTC
|
||||
W: http://www.leox.org
|
||||
|
||||
N: TsiChung Liew
|
||||
E: Tsi-Chung.Liew@freescale.com
|
||||
D: Support for ColdFire MCF523x, MCF532x, MCF5445x, MCF547x_8x
|
||||
W: www.freescale.com
|
||||
|
||||
N: Leif Lindholm
|
||||
E: leif.lindholm@i3micro.com
|
||||
D: Support for AMD dbau1550 board.
|
||||
|
||||
N: Stephan Linz
|
||||
E: linz@li-pro.net
|
||||
D: Support for Nios Stratix Development Kit (DK-1S10)
|
||||
D: Support for SSV ADNP/ESC1 (Nios Cyclone)
|
||||
W: http://www.li-pro.net
|
||||
|
||||
N: Dave Liu
|
||||
E: daveliu@freescale.com
|
||||
D: Support for MPC8315, MPC832x, MPC8360, MPC837x
|
||||
W: www.freescale.com
|
||||
|
||||
N: Raymond Lo
|
||||
E: lo@routefree.com
|
||||
D: Support for DOS partitions
|
||||
|
||||
N: James MacAulay
|
||||
E: james.macaulay@amirix.com
|
||||
D: Suppport for Amirix AP1000
|
||||
W: www.amirix.com
|
||||
|
||||
N: Dan Malek
|
||||
E: dan@embeddedalley.com
|
||||
D: FADSROM, the grandfather of all of this
|
||||
D: Support for Silicon Turnkey eXpress XTc
|
||||
|
||||
N: Andrea "llandre" Marson
|
||||
E: andrea.marson@dave-tech.it
|
||||
D: Port to PPChameleonEVB board
|
||||
W: www.dave-tech.it
|
||||
|
||||
N: Reinhard Meyer
|
||||
E: r.meyer@emk-elektronik.de
|
||||
D: Port to EMK TOP860 Module
|
||||
|
||||
N: Jay Monkman
|
||||
E: jtm@smoothsmoothie.com
|
||||
D: EST SBC8260 support
|
||||
|
||||
N: Frank Morauf
|
||||
E: frank.morauf@salzbrenner.com
|
||||
D: Support for Embedded Planet RPX Super Board
|
||||
|
||||
N: David M?ller
|
||||
E: d.mueller@elsoft.ch
|
||||
D: Support for Samsung ARM920T SMDK2410 eval board
|
||||
|
||||
N: Scott McNutt
|
||||
E: smcnutt@psyent.com
|
||||
D: Support for Altera Nios-32 CPU
|
||||
D: Support for Altera Nios-II CPU
|
||||
D: Support for Nios Cyclone Development Kit (DK-1C20)
|
||||
W: http://www.psyent.com
|
||||
|
||||
N: Rolf Offermanns
|
||||
E: rof@sysgo.de
|
||||
D: Initial support for SSV-DNP1110, SMC91111 driver
|
||||
W: www.elinos.com
|
||||
|
||||
N: John Otken
|
||||
E: jotken@softadvances.com
|
||||
D: Support for AMCC Luan 440SP board
|
||||
|
||||
N: Tolunay Orkun
|
||||
E: torkun@nextio.com
|
||||
D: Support for Cogent CSB272 & CSB472 boards
|
||||
|
||||
N: Keith Outwater
|
||||
E: keith_outwater@mvis.com
|
||||
D: Support for generic/custom MPC860T boards (GEN860T, GEN860T_SC)
|
||||
|
||||
N: Frank Panno
|
||||
E: fpanno@delphintech.com
|
||||
D: Support for Embedded Planet EP8260 Board
|
||||
|
||||
N: Denis Peter
|
||||
E: d.peter@mpl.ch
|
||||
D: Support for 4xx SCSI, floppy, CDROM, CT69000 video, ...
|
||||
D: Support for PIP405 board
|
||||
D: Support for MIP405 board
|
||||
|
||||
N: Dave Peverley
|
||||
E: dpeverley@mpc-data.co.uk
|
||||
W: http://www.mpc-data.co.uk
|
||||
D: OMAP730 P2 board support
|
||||
|
||||
N: Bill Pitts
|
||||
E: wlp@mindspring.com
|
||||
D: BedBug embedded debugger code
|
||||
|
||||
N: Daniel Poirot
|
||||
E: dan.poirot@windriver.com
|
||||
D: Support for the Wind River sbc405, sbc8240 board
|
||||
W: http://www.windriver.com
|
||||
|
||||
N: Stelian Pop
|
||||
E: stelian@popies.net
|
||||
D: Atmel AT91CAP9ADK support
|
||||
|
||||
N: Ricardo Ribalda Delgado
|
||||
E: ricardo.ribalda@uam.es
|
||||
D: PPC440x5 (Virtex5), ML507 Board, eeprom_simul, adt7460, v5fx30teval
|
||||
D: Virtex ppc440 generic architecture
|
||||
D: Virtex ppc405 generic architecture
|
||||
W: http://www.ii.uam.es/~rribalda
|
||||
|
||||
N: Stefan Roese
|
||||
E: sr@denx.de
|
||||
D: AMCC PPC4xx Support
|
||||
W: http://www.denx.de
|
||||
|
||||
N: Erwin Rol
|
||||
E: erwin@muffin.org
|
||||
D: boot support for RTEMS
|
||||
|
||||
N: Paul Ruhland
|
||||
E: pruhland@rochester.rr.com
|
||||
D: Port to Logic Zoom LH7A40x SDK board(s)
|
||||
|
||||
N: Neil Russell
|
||||
E: caret@c-side.com
|
||||
D: Author of LiMon-1.4.2, which contributed some ideas
|
||||
|
||||
N: Travis B. Sawyer
|
||||
E: travis.sawyer@sandburst.com
|
||||
D: Support for AMCC PPC440GX, XES XPedite1000 440GX PrPMC board. AMCC 440gx Ref Platform (Ocotea)
|
||||
|
||||
N: Paolo Scaffardi
|
||||
E: arsenio@tin.it
|
||||
D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots more
|
||||
|
||||
N: Andre Schwarz
|
||||
E: andre.schwarz@matrix-vision.de
|
||||
D: Support for Matrix Vision boards (MVBLM7/MVBC_P/MVSMR)
|
||||
|
||||
N: Robert Schwebel
|
||||
E: r.schwebel@pengutronix.de
|
||||
D: Support for csb226 and innokom boards (PXA2xx)
|
||||
|
||||
N: Aaron Sells
|
||||
E: sellsa@embeddedplanet.com
|
||||
D: Support for EP82xxM
|
||||
|
||||
N: Art Shipkowski
|
||||
E: art@videon-central.com
|
||||
D: Support for NetSilicon NS7520
|
||||
D: Support for ColdFire MCF5275
|
||||
|
||||
N: Jeremy C. Andrus
|
||||
E: jeremy@jeremya.com
|
||||
D: ColdFire MCF5249 initialization code
|
||||
W: jeremya.com
|
||||
|
||||
N: Michal Simek
|
||||
E: monstr@monstr.eu
|
||||
D: Support for Microblaze, ML401, XUPV2P board
|
||||
W: www.monstr.eu
|
||||
|
||||
N: Yasushi Shoji
|
||||
E: yashi@atmark-techno.com
|
||||
D: Support for Xilinx MicroBlaze, for Atmark Techno SUZAKU FPGA board
|
||||
|
||||
N: Kurt Stremerch
|
||||
E: kurt@exys.be
|
||||
D: Support for Exys XSEngine board
|
||||
|
||||
N: Andrea Scian
|
||||
E: andrea.scian@dave-tech.it
|
||||
D: Port to B2 board
|
||||
W: www.dave-tech.it
|
||||
|
||||
N: Timur Tabi
|
||||
E: timur@freescale.com
|
||||
D: Support for MPC8349E-mITX
|
||||
W: www.freescale.com
|
||||
|
||||
N: Rob Taylor
|
||||
E: robt@flyingpig.com
|
||||
D: Port to MBX860T and Sandpoint8240
|
||||
|
||||
N: Erik Theisen
|
||||
E: etheisen@mindspring.com
|
||||
D: MBX8xx and many other patches
|
||||
|
||||
N: Jim Thompson
|
||||
E: jim@musenki.com
|
||||
D: Support for MUSENKI board
|
||||
|
||||
N: Rune Torgersen
|
||||
E: <runet@innovsys.com>
|
||||
D: Support for Motorola MPC8266ADS board
|
||||
|
||||
N: Greg Ungerer
|
||||
E: greg.ungerer@opengear.com
|
||||
D: Support for ks8695 CPU, and OpenGear cmXXXX boards
|
||||
|
||||
N: David Updegraff
|
||||
E: dave@cray.com
|
||||
D: Port to Cray L1 board; DHCP vendor extensions
|
||||
|
||||
N: Christian Vejlbo
|
||||
E: christian.vejlbo@tellabs.com
|
||||
D: FADS860T ethernet support
|
||||
|
||||
N: Robert Whaley
|
||||
E: rwhaley@applieddata.net
|
||||
D: Port to ARM PXA27x adsvix SBC
|
||||
|
||||
N: Martin Winistoerfer
|
||||
E: martinwinistoerfer@gmx.ch
|
||||
D: Port to MPC555/556 microcontrollers and support for cmi board
|
||||
|
||||
N: David Wu
|
||||
E: support@arcturusnetworks.com
|
||||
D: Mercury Security EP2500
|
||||
W: http://www.arcturusnetworks.com
|
||||
|
||||
N: Ming-Len Wu
|
||||
E: minglen_wu@techware.com.tw
|
||||
D: Motorola MX1ADS board support
|
||||
W: http://www.techware.com.tw/
|
||||
|
||||
N: Xianghua Xiao
|
||||
E: x.xiao@motorola.com
|
||||
D: Support for Motorola 85xx(PowerQUICC III) chip, MPC8540ADS and MPC8560ADS boards.
|
||||
|
||||
N: John Zhan
|
||||
E: zhanz@sinovee.com
|
||||
D: Support for SinoVee Microsystems SC8xx SBC
|
||||
|
||||
N: Alex Zuepke
|
||||
E: azu@sysgo.de
|
||||
D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM
|
||||
W: www.elinos.com
|
||||
|
||||
N: Nobuhiro Iwamatsu
|
||||
E: iwamatsu@nigauri.org
|
||||
D: Support for SuperH, MS7750SE01 and MS7722SE01 boards.
|
||||
W: http://www.nigauri.org/~iwamatsu/
|
||||
|
||||
N: Alan Lu
|
||||
E: alnalu001@gmail.com
|
||||
D: Support for Artila M-501 starter kit
|
||||
W: http://www.artila.com/
|
||||
|
||||
N: Kimmo Leppala
|
||||
E: kimmo.leppala@sysart.fi
|
||||
D: Support for Artila M-501 starter kit
|
||||
W: http://www.sysart.fi/
|
||||
|
||||
N: Timo Tuunainen
|
||||
E: timo.tuunainen@sysart.fi
|
||||
D: Support for Artila M-501 starter kit
|
||||
W: http://www.sysart.fi/
|
||||
|
||||
N: Philip Balister
|
||||
E: philip@opensdr.com
|
||||
D: Port to Lyrtech SFFSDR development board.
|
||||
W: www.opensdr.com
|
||||
@ -177,10 +177,6 @@ config TARGET_ETHERNUT5
|
||||
bool "Support ethernut5"
|
||||
select CPU_ARM926EJS
|
||||
|
||||
config TARGET_TOP9000
|
||||
bool "Support top9000"
|
||||
select CPU_ARM926EJS
|
||||
|
||||
config TARGET_MEESC
|
||||
bool "Support meesc"
|
||||
select CPU_ARM926EJS
|
||||
|
||||
@ -1,35 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2010
|
||||
* Reinhard Meyer, reinhard.meyer@emk-elektronik.de
|
||||
*
|
||||
* Shutdown Controller
|
||||
* Based on AT91SAM9XE datasheet
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef AT91_SHDWN_H
|
||||
#define AT91_SHDWN_H
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
struct at91_shdwn {
|
||||
u32 cr; /* Control Rer. WO */
|
||||
u32 mr; /* Mode Register RW 0x00000003 */
|
||||
u32 sr; /* Status Register RO 0x00000000 */
|
||||
};
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#define AT91_SHDW_CR_KEY 0xa5000000
|
||||
#define AT91_SHDW_CR_SHDW 0x00000001
|
||||
|
||||
#define AT91_SHDW_MR_RTTWKEN 0x00010000
|
||||
#define AT91_SHDW_MR_CPTWK0 0x000000f0
|
||||
#define AT91_SHDW_MR_WKMODE0H2L 0x00000002
|
||||
#define AT91_SHDW_MR_WKMODE0L2H 0x00000001
|
||||
|
||||
#define AT91_SHDW_SR_RTTWK 0x00010000
|
||||
#define AT91_SHDW_SR_WAKEUP0 0x00000001
|
||||
|
||||
#endif
|
||||
@ -56,9 +56,6 @@ config TARGET_TOTAL5200
|
||||
config TARGET_V38B
|
||||
bool "Support v38b"
|
||||
|
||||
config TARGET_TOP5200
|
||||
bool "Support TOP5200"
|
||||
|
||||
config TARGET_CPCI5200
|
||||
bool "Support cpci5200"
|
||||
|
||||
|
||||
@ -40,9 +40,6 @@ config TARGET_RRVISION
|
||||
config TARGET_SPD823TS
|
||||
bool "Support SPD823TS"
|
||||
|
||||
config TARGET_TOP860
|
||||
bool "Support TOP860"
|
||||
|
||||
config TARGET_KUP4K
|
||||
bool "Support KUP4K"
|
||||
|
||||
|
||||
6
board/kosagi/novena/MAINTAINERS
Normal file
6
board/kosagi/novena/MAINTAINERS
Normal file
@ -0,0 +1,6 @@
|
||||
NOVENA BOARD
|
||||
M: Marek Vasut <marex@denx.de>
|
||||
S: Maintained
|
||||
F: board/kosagi/novena/
|
||||
F: include/configs/novena.h
|
||||
F: configs/novena_defconfig
|
||||
@ -1,8 +0,0 @@
|
||||
#
|
||||
# (C) Copyright 2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y = mv_common.o
|
||||
@ -1,112 +0,0 @@
|
||||
/*
|
||||
* (C) Copyright 2008
|
||||
* Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <malloc.h>
|
||||
#include <environment.h>
|
||||
#include <fpga.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#ifndef CONFIG_ENV_IS_NOWHERE
|
||||
static char* entries_to_keep[] = {
|
||||
"serial#", "ethaddr", "eth1addr", "model_info", "sensor_cnt",
|
||||
"fpgadatasize", "ddr_size", "use_dhcp", "use_static_ipaddr",
|
||||
"static_ipaddr", "static_netmask", "static_gateway",
|
||||
"syslog", "watchdog", "netboot", "evo8serialnumber" };
|
||||
|
||||
#define MV_MAX_ENV_ENTRY_LENGTH 64
|
||||
#define MV_KEEP_ENTRIES ARRAY_SIZE(entries_to_keep)
|
||||
|
||||
void mv_reset_environment(void)
|
||||
{
|
||||
int i;
|
||||
char *s[MV_KEEP_ENTRIES];
|
||||
char entries[MV_KEEP_ENTRIES][MV_MAX_ENV_ENTRY_LENGTH];
|
||||
|
||||
printf("\n*** RESET ENVIRONMENT ***\n");
|
||||
|
||||
memset(entries, 0, MV_KEEP_ENTRIES * MV_MAX_ENV_ENTRY_LENGTH);
|
||||
for (i = 0; i < MV_KEEP_ENTRIES; i++) {
|
||||
s[i] = getenv(entries_to_keep[i]);
|
||||
if (s[i]) {
|
||||
printf("save '%s' : %s\n", entries_to_keep[i], s[i]);
|
||||
strncpy(entries[i], s[i], MV_MAX_ENV_ENTRY_LENGTH);
|
||||
}
|
||||
}
|
||||
|
||||
gd->env_valid = 0;
|
||||
env_relocate();
|
||||
|
||||
for (i = 0; i < MV_KEEP_ENTRIES; i++) {
|
||||
if (s[i]) {
|
||||
printf("restore '%s' : %s\n", entries_to_keep[i], s[i]);
|
||||
setenv(entries_to_keep[i], s[i]);
|
||||
}
|
||||
}
|
||||
|
||||
saveenv();
|
||||
}
|
||||
#endif
|
||||
|
||||
int mv_load_fpga(void)
|
||||
{
|
||||
int result;
|
||||
size_t data_size = 0;
|
||||
void *fpga_data = NULL;
|
||||
char *datastr = getenv("fpgadata");
|
||||
char *sizestr = getenv("fpgadatasize");
|
||||
|
||||
if (getenv("skip_fpga")) {
|
||||
printf("found 'skip_fpga' -> FPGA _not_ loaded !\n");
|
||||
return -1;
|
||||
}
|
||||
printf("loading FPGA\n");
|
||||
|
||||
if (datastr)
|
||||
fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
|
||||
if (sizestr)
|
||||
data_size = (size_t)simple_strtoul(sizestr, NULL, 16);
|
||||
if (!data_size) {
|
||||
printf("fpgadatasize invalid -> FPGA _not_ loaded !\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
result = fpga_load(0, fpga_data, data_size, BIT_FULL);
|
||||
if (!result)
|
||||
bootstage_mark(BOOTSTAGE_ID_START);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
u8 *dhcp_vendorex_prep(u8 *e)
|
||||
{
|
||||
char *ptr;
|
||||
|
||||
/* DHCP vendor-class-identifier = 60 */
|
||||
if ((ptr = getenv("dhcp_vendor-class-identifier"))) {
|
||||
*e++ = 60;
|
||||
*e++ = strlen(ptr);
|
||||
while (*ptr)
|
||||
*e++ = *ptr++;
|
||||
}
|
||||
/* DHCP_CLIENT_IDENTIFIER = 61 */
|
||||
if ((ptr = getenv("dhcp_client_id"))) {
|
||||
*e++ = 61;
|
||||
*e++ = strlen(ptr);
|
||||
while (*ptr)
|
||||
*e++ = *ptr++;
|
||||
}
|
||||
|
||||
return e;
|
||||
}
|
||||
|
||||
u8 *dhcp_vendorex_proc(u8 *popt)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
@ -1,9 +0,0 @@
|
||||
/*
|
||||
* Copyright 2008 Matrix Vision GmbH
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
|
||||
extern int mv_load_fpga(void);
|
||||
extern void mv_reset_environment(void);
|
||||
@ -98,4 +98,10 @@ void twl4030_power_mmc_init(void)
|
||||
TWL4030_PM_RECEIVER_VMMC1_VSEL_32,
|
||||
TWL4030_PM_RECEIVER_VMMC1_DEV_GRP,
|
||||
TWL4030_PM_RECEIVER_DEV_GRP_P1);
|
||||
|
||||
/* Set VMMC2 to 3.15 Volts */
|
||||
twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED,
|
||||
TWL4030_PM_RECEIVER_VMMC2_VSEL_32,
|
||||
TWL4030_PM_RECEIVER_VMMC2_DEV_GRP,
|
||||
TWL4030_PM_RECEIVER_DEV_GRP_P1);
|
||||
}
|
||||
|
||||
@ -395,6 +395,8 @@
|
||||
#define TWL4030_PM_RECEIVER_VDAC_VSEL_18 0x03
|
||||
#define TWL4030_PM_RECEIVER_VMMC1_VSEL_30 0x02
|
||||
#define TWL4030_PM_RECEIVER_VMMC1_VSEL_32 0x03
|
||||
#define TWL4030_PM_RECEIVER_VMMC2_VSEL_30 0x0B
|
||||
#define TWL4030_PM_RECEIVER_VMMC2_VSEL_32 0x0C
|
||||
#define TWL4030_PM_RECEIVER_VSIM_VSEL_18 0x03
|
||||
|
||||
/* Device Selection in PM Receiver Module */
|
||||
|
||||
@ -1,174 +0,0 @@
|
||||
/*
|
||||
* (C) Copyright 2003
|
||||
* Gerry Hamel, geh@ti.com, Texas Instruments
|
||||
*
|
||||
* Based on
|
||||
* linux/drivers/usb/device/bi/omap.h
|
||||
* Register definitions for TI OMAP1510 USB bus interface driver
|
||||
*
|
||||
* Author: MontaVista Software, Inc.
|
||||
* source@mvista.com
|
||||
*
|
||||
* 2003 (c) MontaVista Software, Inc. This file is licensed under
|
||||
* the terms of the GNU General Public License version 2. This program
|
||||
* is licensed "as is" without any warranty of any kind, whether express
|
||||
* or implied.
|
||||
*/
|
||||
|
||||
#ifndef __USBDCORE_OMAP1510_H__
|
||||
#define __USBDCORE_OMAP1510_H__
|
||||
|
||||
|
||||
/*
|
||||
* 13.2 MPU Register Map
|
||||
*/
|
||||
|
||||
/* Table 13-1. USB Function Module Registers (endpoint) */
|
||||
#define UDC_BASE 0xFFFB4000
|
||||
#define UDC_OFFSET(offset) (UDC_BASE + (offset))
|
||||
#define UDC_REV UDC_OFFSET(0x0) /* Revision */
|
||||
#define UDC_EP_NUM UDC_OFFSET(0x4) /* Endpoint selection */
|
||||
#define UDC_DATA UDC_OFFSET(0x08) /* Data */
|
||||
#define UDC_CTRL UDC_OFFSET(0x0C) /* Control */
|
||||
#define UDC_STAT_FLG UDC_OFFSET(0x10) /* Status flag */
|
||||
#define UDC_RXFSTAT UDC_OFFSET(0x14) /* Receive FIFO status */
|
||||
#define UDC_SYSCON1 UDC_OFFSET(0x18) /* System configuration 1 */
|
||||
#define UDC_SYSCON2 UDC_OFFSET(0x1C) /* System configuration 2 */
|
||||
#define UDC_DEVSTAT UDC_OFFSET(0x20) /* Device status */
|
||||
#define UDC_SOF UDC_OFFSET(0x24) /* Start of frame */
|
||||
#define UDC_IRQ_EN UDC_OFFSET(0x28) /* Interrupt enable */
|
||||
#define UDC_DMA_IRQ_EN UDC_OFFSET(0x2C) /* DMA interrupt enable */
|
||||
#define UDC_IRQ_SRC UDC_OFFSET(0x30) /* Interrupt source */
|
||||
#define UDC_EPN_STAT UDC_OFFSET(0x34) /* Endpoint interrupt status */
|
||||
#define UDC_DMAN_STAT UDC_OFFSET(0x3C) /* DMA endpoint interrupt status */
|
||||
|
||||
/* IRQ_EN register fields */
|
||||
#define UDC_Sof_IE (1 << 7) /* Start-of-frame interrupt enabled */
|
||||
#define UDC_EPn_RX_IE (1 << 5) /* Receive endpoint interrupt enabled */
|
||||
#define UDC_EPn_TX_IE (1 << 4) /* Transmit endpoint interrupt enabled */
|
||||
#define UDC_DS_Chg_IE (1 << 3) /* Device state changed interrupt enabled */
|
||||
#define UDC_EP0_IE (1 << 0) /* EP0 transaction interrupt enabled */
|
||||
|
||||
/* IRQ_SRC register fields */
|
||||
#define UDC_TXn_Done (1 << 10) /* Transmit DMA channel n done */
|
||||
#define UDC_RXn_Cnt (1 << 9) /* Receive DMA channel n transactions count */
|
||||
#define UDC_RXn_EOT (1 << 8) /* Receive DMA channel n end of transfer */
|
||||
#define UDC_SOF_Flg (1 << 7) /* Start-of-frame interrupt flag */
|
||||
#define UDC_EPn_RX (1 << 5) /* Endpoint n OUT transaction */
|
||||
#define UDC_EPn_TX (1 << 4) /* Endpoint n IN transaction */
|
||||
#define UDC_DS_Chg (1 << 3) /* Device state changed */
|
||||
#define UDC_Setup (1 << 2) /* Setup transaction */
|
||||
#define UDC_EP0_RX (1 << 1) /* EP0 OUT transaction */
|
||||
#define UDC_EP0_TX (1 << 0) /* EP0 IN transaction */
|
||||
|
||||
/* DEVSTAT register fields, 14.2.9 */
|
||||
#define UDC_R_WK_OK (1 << 6) /* Remote wakeup granted */
|
||||
#define UDC_USB_Reset (1 << 5) /* USB reset signalling is active */
|
||||
#define UDC_SUS (1 << 4) /* Suspended state */
|
||||
#define UDC_CFG (1 << 3) /* Configured state */
|
||||
#define UDC_ADD (1 << 2) /* Addressed state */
|
||||
#define UDC_DEF (1 << 1) /* Default state */
|
||||
#define UDC_ATT (1 << 0) /* Attached state */
|
||||
|
||||
/* SYSCON1 register fields */
|
||||
#define UDC_Cfg_Lock (1 << 8) /* Device configuration locked */
|
||||
#define UDC_Nak_En (1 << 4) /* NAK enable */
|
||||
#define UDC_Self_Pwr (1 << 2) /* Device is self-powered */
|
||||
#define UDC_Soff_Dis (1 << 1) /* Shutoff disabled */
|
||||
#define UDC_Pullup_En (1 << 0) /* External pullup enabled */
|
||||
|
||||
/* SYSCON2 register fields */
|
||||
#define UDC_Rmt_Wkp (1 << 6) /* Remote wakeup */
|
||||
#define UDC_Stall_Cmd (1 << 5) /* Stall endpoint */
|
||||
#define UDC_Dev_Cfg (1 << 3) /* Device configured */
|
||||
#define UDC_Clr_Cfg (1 << 2) /* Clear configured */
|
||||
|
||||
/*
|
||||
* Select and enable endpoints
|
||||
*/
|
||||
|
||||
/* Table 13-1. USB Function Module Registers (endpoint configuration) */
|
||||
#define UDC_EPBASE UDC_OFFSET(0x80) /* Endpoints base address */
|
||||
#define UDC_EP0 UDC_EPBASE /* Control endpoint configuration */
|
||||
#define UDC_EP_RX_BASE UDC_OFFSET(0x84) /* Receive endpoints base address */
|
||||
#define UDC_EP_RX(endpoint) (UDC_EP_RX_BASE + ((endpoint) - 1) * 4)
|
||||
#define UDC_EP_TX_BASE UDC_OFFSET(0xC4) /* Transmit endpoints base address */
|
||||
#define UDC_EP_TX(endpoint) (UDC_EP_TX_BASE + ((endpoint) - 1) * 4)
|
||||
|
||||
/* EP_NUM register fields */
|
||||
#define UDC_Setup_Sel (1 << 6) /* Setup FIFO select */
|
||||
#define UDC_EP_Sel (1 << 5) /* TX/RX FIFO select */
|
||||
#define UDC_EP_Dir (1 << 4) /* Endpoint direction */
|
||||
|
||||
/* CTRL register fields */
|
||||
#define UDC_Clr_Halt (1 << 7) /* Clear halt endpoint */
|
||||
#define UDC_Set_Halt (1 << 6) /* Set halt endpoint */
|
||||
#define UDC_Set_FIFO_En (1 << 2) /* Set FIFO enable */
|
||||
#define UDC_Clr_EP (1 << 1) /* Clear endpoint */
|
||||
#define UDC_Reset_EP (1 << 0) /* Reset endpoint */
|
||||
|
||||
/* STAT_FLG register fields */
|
||||
#define UDC_Miss_In (1 << 14)
|
||||
#define UDC_Data_Flush (1 << 13)
|
||||
#define UDC_ISO_Err (1 << 12)
|
||||
#define UDC_ISO_FIFO_Empty (1 << 9)
|
||||
#define UDC_ISO_FIFO_Full (1 << 8)
|
||||
#define UDC_EP_Halted (1 << 6)
|
||||
#define UDC_STALL (1 << 5)
|
||||
#define UDC_NAK (1 << 4)
|
||||
#define UDC_ACK (1 << 3)
|
||||
#define UDC_FIFO_En (1 << 2)
|
||||
#define UDC_Non_ISO_FIFO_Empty (1 << 1)
|
||||
#define UDC_Non_ISO_FIFO_Full (1 << 0)
|
||||
|
||||
/* EPn_RX register fields */
|
||||
#define UDC_EPn_RX_Valid (1 << 15) /* valid */
|
||||
#define UDC_EPn_RX_Db (1 << 14) /* double-buffer */
|
||||
#define UDC_EPn_RX_Iso (1 << 11) /* isochronous */
|
||||
|
||||
/* EPn_TX register fields */
|
||||
#define UDC_EPn_TX_Valid (1 << 15) /* valid */
|
||||
#define UDC_EPn_TX_Db (1 << 14) /* double-buffer */
|
||||
#define UDC_EPn_TX_Iso (1 << 11) /* isochronous */
|
||||
|
||||
#define EP0_PACKETSIZE 0x40
|
||||
|
||||
/* physical to logical endpoint mapping
|
||||
* Physical endpoints are an index into device->bus->endpoint_array.
|
||||
* Logical endpoints are endpoints 0 to 15 IN and OUT as defined in
|
||||
* the USB specification.
|
||||
*
|
||||
* physical ep logical ep direction endpoint_address
|
||||
* 0 0 IN and OUT 0x00
|
||||
* 1 to 15 1 to 15 OUT 0x01 to 0x0f
|
||||
* 16 to 30 1 to 15 IN 0x81 to 0x8f
|
||||
*/
|
||||
#define PHYS_EP_TO_EP_ADDR(ep) (((ep) < 16) ? (ep) : (((ep) - 15) | 0x80))
|
||||
#define EP_ADDR_TO_PHYS_EP(a) (((a) & 0x80) ? (((a) & ~0x80) + 15) : (a))
|
||||
|
||||
/* MOD_CONF_CTRL_0 bits (FIXME: move to board hardware.h ?) */
|
||||
#define CONF_MOD_USB_W2FC_VBUS_MODE_R (1 << 17)
|
||||
|
||||
/* Other registers (may be) related to USB */
|
||||
|
||||
#define CLOCK_CTRL (0xFFFE0830)
|
||||
#define APLL_CTRL (0xFFFE084C)
|
||||
#define DPLL_CTRL (0xFFFE083C)
|
||||
#define SOFT_REQ (0xFFFE0834)
|
||||
#define STATUS_REQ (0xFFFE0840)
|
||||
|
||||
/* FUNC_MUX_CTRL_0 bits related to USB */
|
||||
#define UDC_VBUS_CTRL (1 << 19)
|
||||
#define UDC_VBUS_MODE (1 << 18)
|
||||
|
||||
/* OMAP Endpoint parameters */
|
||||
#define UDC_OUT_PACKET_SIZE 64
|
||||
#define UDC_IN_PACKET_SIZE 64
|
||||
#define UDC_INT_PACKET_SIZE 16
|
||||
#define UDC_BULK_PACKET_SIZE 16
|
||||
|
||||
#define UDC_INT_ENDPOINT 5
|
||||
#define UDC_OUT_ENDPOINT 2
|
||||
#define UDC_IN_ENDPOINT 1
|
||||
|
||||
#endif
|
||||
@ -12,6 +12,7 @@
|
||||
*/
|
||||
|
||||
#include "imagetool.h"
|
||||
#include <limits.h>
|
||||
#include <image.h>
|
||||
#include <stdint.h>
|
||||
#include "kwbimage.h"
|
||||
@ -396,13 +397,20 @@ static size_t image_headersz_v1(struct image_tool_params *params,
|
||||
|
||||
ret = stat(binarye->binary.file, &s);
|
||||
if (ret < 0) {
|
||||
char *cwd = get_current_dir_name();
|
||||
char cwd[PATH_MAX];
|
||||
char *dir = cwd;
|
||||
|
||||
memset(cwd, 0, sizeof(cwd));
|
||||
if (!getcwd(cwd, sizeof(cwd))) {
|
||||
dir = "current working directory";
|
||||
perror("getcwd() failed");
|
||||
}
|
||||
|
||||
fprintf(stderr,
|
||||
"Didn't find the file '%s' in '%s' which is mandatory to generate the image\n"
|
||||
"This file generally contains the DDR3 training code, and should be extracted from an existing bootable\n"
|
||||
"image for your board. See 'kwbimage -x' to extract it from an existing image.\n",
|
||||
binarye->binary.file, cwd);
|
||||
free(cwd);
|
||||
binarye->binary.file, dir);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -752,14 +760,25 @@ static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd,
|
||||
}
|
||||
|
||||
version = image_get_version();
|
||||
/* Fallback to version 0 is no version is provided in the cfg file */
|
||||
if (version == -1)
|
||||
version = 0;
|
||||
|
||||
if (version == 0)
|
||||
switch (version) {
|
||||
/*
|
||||
* Fallback to version 0 if no version is provided in the
|
||||
* cfg file
|
||||
*/
|
||||
case -1:
|
||||
case 0:
|
||||
image = image_create_v0(&headersz, params, sbuf->st_size);
|
||||
else if (version == 1)
|
||||
break;
|
||||
|
||||
case 1:
|
||||
image = image_create_v1(&headersz, params, sbuf->st_size);
|
||||
break;
|
||||
|
||||
default:
|
||||
fprintf(stderr, "Unsupported version %d\n", version);
|
||||
free(image_cfg);
|
||||
exit(EXIT_FAILURE);
|
||||
}
|
||||
|
||||
if (!image) {
|
||||
fprintf(stderr, "Could not create image\n");
|
||||
|
||||
Loading…
Reference in New Issue
Block a user