From 05e23dd489685c99be4ff4fe1c41543a3688dceb Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Mon, 29 Jan 2018 18:14:14 +0100 Subject: [PATCH] clk: clk_stm32: Add .set_rate callback Since 'commit f4fcba5c5baa ("clk: implement clk_set_defaults()")' STM32F4 family board can't boot. Above patch calls clk_set_rate() for all nodes with assigned-clock-rates property. Clock driver for STM32F family doesn't implement .set_rate callback which make clk_set_defaults() exit on error and prevent board to boot. Fixes: f4fcba5c5baa ("clk: implement clk_set_defaults()") Signed-off-by: Patrice Chotard --- drivers/clk/clk_stm32f.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c index 06827fec75..926b249ff3 100644 --- a/drivers/clk/clk_stm32f.c +++ b/drivers/clk/clk_stm32f.c @@ -337,6 +337,11 @@ static unsigned long stm32_clk_get_rate(struct clk *clk) } } +static ulong stm32_set_rate(struct clk *clk, ulong rate) +{ + return 0; +} + static int stm32_clk_enable(struct clk *clk) { struct stm32_clk *priv = dev_get_priv(clk->dev); @@ -464,6 +469,7 @@ static struct clk_ops stm32_clk_ops = { .of_xlate = stm32_clk_of_xlate, .enable = stm32_clk_enable, .get_rate = stm32_clk_get_rate, + .set_rate = stm32_set_rate, }; U_BOOT_DRIVER(stm32fx_clk) = {