mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction
The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
This commit is contained in:
Roger Quadros
Dario Binacchi
parent
a95410696d
commit
04fcd25873
@ -27,6 +27,9 @@
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#define BADBLOCK_MARKER_LENGTH 2
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#define SECTOR_BYTES 512
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#define ECCSIZE0_SHIFT 12
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#define ECCSIZE1_SHIFT 22
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#define ECC1RESULTSIZE 0x1
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#define ECCCLEAR (0x1 << 8)
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#define ECCRESULTREG1 (0x1 << 0)
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/* 4 bit padding to make byte aligned, 56 = 52 + 4 */
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@ -186,72 +189,35 @@ static int __maybe_unused omap_correct_data(struct mtd_info *mtd, uint8_t *dat,
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__maybe_unused
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static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
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{
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struct nand_chip *nand = mtd_to_nand(mtd);
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struct omap_nand_info *info = nand_get_controller_data(nand);
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struct nand_chip *nand = mtd_to_nand(mtd);
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struct omap_nand_info *info = nand_get_controller_data(nand);
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unsigned int dev_width = (nand->options & NAND_BUSWIDTH_16) ? 1 : 0;
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unsigned int ecc_algo = 0;
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unsigned int bch_type = 0;
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unsigned int eccsize1 = 0x00, eccsize0 = 0x00, bch_wrapmode = 0x00;
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u32 ecc_size_config_val = 0;
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u32 ecc_config_val = 0;
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int cs = info->cs;
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u32 val;
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/* configure GPMC for specific ecc-scheme */
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switch (info->ecc_scheme) {
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case OMAP_ECC_HAM1_CODE_SW:
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return;
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case OMAP_ECC_HAM1_CODE_HW:
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ecc_algo = 0x0;
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bch_type = 0x0;
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bch_wrapmode = 0x00;
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eccsize0 = 0xFF;
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eccsize1 = 0xFF;
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break;
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case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
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case OMAP_ECC_BCH8_CODE_HW:
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ecc_algo = 0x1;
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bch_type = 0x1;
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if (mode == NAND_ECC_WRITE) {
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bch_wrapmode = 0x01;
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eccsize0 = 0; /* extra bits in nibbles per sector */
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eccsize1 = 28; /* OOB bits in nibbles per sector */
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} else {
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bch_wrapmode = 0x01;
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eccsize0 = 26; /* ECC bits in nibbles per sector */
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eccsize1 = 2; /* non-ECC bits in nibbles per sector */
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}
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break;
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case OMAP_ECC_BCH16_CODE_HW:
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ecc_algo = 0x1;
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bch_type = 0x2;
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if (mode == NAND_ECC_WRITE) {
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bch_wrapmode = 0x01;
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eccsize0 = 0; /* extra bits in nibbles per sector */
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eccsize1 = 52; /* OOB bits in nibbles per sector */
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} else {
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bch_wrapmode = 0x01;
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eccsize0 = 52; /* ECC bits in nibbles per sector */
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eccsize1 = 0; /* non-ECC bits in nibbles per sector */
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}
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break;
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default:
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return;
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}
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/* Clear ecc and enable bits */
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writel(ECCCLEAR | ECCRESULTREG1, &gpmc_cfg->ecc_control);
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/* Configure ecc size for BCH */
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ecc_size_config_val = (eccsize1 << 22) | (eccsize0 << 12);
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writel(ecc_size_config_val, &gpmc_cfg->ecc_size_config);
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/* Configure device details for BCH engine */
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ecc_config_val = ((ecc_algo << 16) | /* HAM1 | BCHx */
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(bch_type << 12) | /* BCH4/BCH8/BCH16 */
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(bch_wrapmode << 8) | /* wrap mode */
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(dev_width << 7) | /* bus width */
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(0x0 << 4) | /* number of sectors */
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(cs << 1) | /* ECC CS */
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(0x1)); /* enable ECC */
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writel(ecc_config_val, &gpmc_cfg->ecc_config);
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/* program ecc and result sizes */
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val = ((((nand->ecc.size >> 1) - 1) << ECCSIZE1_SHIFT) |
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ECC1RESULTSIZE);
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writel(val, &gpmc_cfg->ecc_size_config);
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switch (mode) {
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case NAND_ECC_READ:
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case NAND_ECC_WRITE:
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writel(ECCCLEAR | ECCRESULTREG1, &gpmc_cfg->ecc_control);
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break;
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case NAND_ECC_READSYN:
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writel(ECCCLEAR, &gpmc_cfg->ecc_control);
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break;
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default:
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printf("%s: error: unrecognized Mode[%d]!\n", __func__, mode);
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break;
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}
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/* (ECC 16 or 8 bit col) | ( CS ) | ECC Enable */
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val = (dev_width << 7) | (info->cs << 1) | (0x1);
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writel(val, &gpmc_cfg->ecc_config);
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}
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/*
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@ -270,6 +236,124 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
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*/
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static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat,
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uint8_t *ecc_code)
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{
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u32 val;
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val = readl(&gpmc_cfg->ecc1_result);
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ecc_code[0] = val & 0xFF;
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ecc_code[1] = (val >> 16) & 0xFF;
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ecc_code[2] = ((val >> 8) & 0x0F) | ((val >> 20) & 0xF0);
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return 0;
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}
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/* GPMC ecc engine settings for read */
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#define BCH_WRAPMODE_1 1 /* BCH wrap mode 1 */
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#define BCH8R_ECC_SIZE0 0x1a /* ecc_size0 = 26 */
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#define BCH8R_ECC_SIZE1 0x2 /* ecc_size1 = 2 */
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#define BCH4R_ECC_SIZE0 0xd /* ecc_size0 = 13 */
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#define BCH4R_ECC_SIZE1 0x3 /* ecc_size1 = 3 */
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/* GPMC ecc engine settings for write */
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#define BCH_WRAPMODE_6 6 /* BCH wrap mode 6 */
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#define BCH_ECC_SIZE0 0x0 /* ecc_size0 = 0, no oob protection */
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#define BCH_ECC_SIZE1 0x20 /* ecc_size1 = 32 */
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/**
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* omap_enable_hwecc_bch - Program GPMC to perform BCH ECC calculation
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* @mtd: MTD device structure
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* @mode: Read/Write mode
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*
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* When using BCH with SW correction (i.e. no ELM), sector size is set
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* to 512 bytes and we use BCH_WRAPMODE_6 wrapping mode
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* for both reading and writing with:
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* eccsize0 = 0 (no additional protected byte in spare area)
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* eccsize1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
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*/
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static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd,
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int mode)
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{
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unsigned int bch_type;
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unsigned int dev_width, nsectors;
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct omap_nand_info *info = nand_get_controller_data(chip);
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u32 val, wr_mode;
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unsigned int ecc_size1, ecc_size0;
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/* GPMC configurations for calculating ECC */
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switch (info->ecc_scheme) {
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case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
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bch_type = 1;
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nsectors = 1;
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wr_mode = BCH_WRAPMODE_6;
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ecc_size0 = BCH_ECC_SIZE0;
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ecc_size1 = BCH_ECC_SIZE1;
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break;
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case OMAP_ECC_BCH8_CODE_HW:
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bch_type = 1;
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nsectors = chip->ecc.steps;
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if (mode == NAND_ECC_READ) {
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wr_mode = BCH_WRAPMODE_1;
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ecc_size0 = BCH8R_ECC_SIZE0;
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ecc_size1 = BCH8R_ECC_SIZE1;
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} else {
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wr_mode = BCH_WRAPMODE_6;
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ecc_size0 = BCH_ECC_SIZE0;
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ecc_size1 = BCH_ECC_SIZE1;
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}
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break;
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case OMAP_ECC_BCH16_CODE_HW:
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bch_type = 0x2;
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nsectors = chip->ecc.steps;
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if (mode == NAND_ECC_READ) {
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wr_mode = 0x01;
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ecc_size0 = 52; /* ECC bits in nibbles per sector */
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ecc_size1 = 0; /* non-ECC bits in nibbles per sector */
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} else {
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wr_mode = 0x01;
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ecc_size0 = 0; /* extra bits in nibbles per sector */
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ecc_size1 = 52; /* OOB bits in nibbles per sector */
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}
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break;
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default:
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return;
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}
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writel(ECCRESULTREG1, &gpmc_cfg->ecc_control);
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/* Configure ecc size for BCH */
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val = (ecc_size1 << ECCSIZE1_SHIFT) | (ecc_size0 << ECCSIZE0_SHIFT);
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writel(val, &gpmc_cfg->ecc_size_config);
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dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0;
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/* BCH configuration */
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val = ((1 << 16) | /* enable BCH */
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(bch_type << 12) | /* BCH4/BCH8/BCH16 */
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(wr_mode << 8) | /* wrap mode */
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(dev_width << 7) | /* bus width */
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(((nsectors - 1) & 0x7) << 4) | /* number of sectors */
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(info->cs << 1) | /* ECC CS */
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(0x1)); /* enable ECC */
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writel(val, &gpmc_cfg->ecc_config);
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/* Clear ecc and enable bits */
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writel(ECCCLEAR | ECCRESULTREG1, &gpmc_cfg->ecc_control);
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}
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/**
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* _omap_calculate_ecc_bch - Generate BCH ECC bytes for one sector
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* @mtd: MTD device structure
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* @dat: The pointer to data on which ecc is computed
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* @ecc_code: The ecc_code buffer
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* @sector: The sector number (for a multi sector page)
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*
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* Support calculating of BCH4/8/16 ECC vectors for one sector
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* within a page. Sector number is in @sector.
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*/
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static int _omap_calculate_ecc_bch(struct mtd_info *mtd, const u8 *dat,
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u8 *ecc_code, int sector)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct omap_nand_info *info = nand_get_controller_data(chip);
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@ -278,17 +362,11 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat,
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int8_t i = 0, j;
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switch (info->ecc_scheme) {
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case OMAP_ECC_HAM1_CODE_HW:
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val = readl(&gpmc_cfg->ecc1_result);
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ecc_code[0] = val & 0xFF;
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ecc_code[1] = (val >> 16) & 0xFF;
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ecc_code[2] = ((val >> 8) & 0x0F) | ((val >> 20) & 0xF0);
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break;
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#ifdef CONFIG_BCH
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case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
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#endif
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case OMAP_ECC_BCH8_CODE_HW:
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ptr = &gpmc_cfg->bch_result_0_3[0].bch_result_x[3];
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ptr = &gpmc_cfg->bch_result_0_3[sector].bch_result_x[3];
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val = readl(ptr);
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ecc_code[i++] = (val >> 0) & 0xFF;
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ptr--;
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@ -300,23 +378,24 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat,
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ecc_code[i++] = (val >> 0) & 0xFF;
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ptr--;
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}
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break;
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case OMAP_ECC_BCH16_CODE_HW:
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val = readl(&gpmc_cfg->bch_result_4_6[0].bch_result_x[2]);
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val = readl(&gpmc_cfg->bch_result_4_6[sector].bch_result_x[2]);
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ecc_code[i++] = (val >> 8) & 0xFF;
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ecc_code[i++] = (val >> 0) & 0xFF;
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val = readl(&gpmc_cfg->bch_result_4_6[0].bch_result_x[1]);
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val = readl(&gpmc_cfg->bch_result_4_6[sector].bch_result_x[1]);
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ecc_code[i++] = (val >> 24) & 0xFF;
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ecc_code[i++] = (val >> 16) & 0xFF;
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ecc_code[i++] = (val >> 8) & 0xFF;
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ecc_code[i++] = (val >> 0) & 0xFF;
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val = readl(&gpmc_cfg->bch_result_4_6[0].bch_result_x[0]);
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val = readl(&gpmc_cfg->bch_result_4_6[sector].bch_result_x[0]);
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ecc_code[i++] = (val >> 24) & 0xFF;
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ecc_code[i++] = (val >> 16) & 0xFF;
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ecc_code[i++] = (val >> 8) & 0xFF;
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ecc_code[i++] = (val >> 0) & 0xFF;
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for (j = 3; j >= 0; j--) {
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val = readl(&gpmc_cfg->bch_result_0_3[0].bch_result_x[j]
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val = readl(&gpmc_cfg->bch_result_0_3[sector].bch_result_x[j]
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);
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ecc_code[i++] = (val >> 24) & 0xFF;
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ecc_code[i++] = (val >> 16) & 0xFF;
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@ -329,18 +408,18 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat,
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}
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/* ECC scheme specific syndrome customizations */
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switch (info->ecc_scheme) {
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case OMAP_ECC_HAM1_CODE_HW:
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break;
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#ifdef CONFIG_BCH
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case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
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/* Add constant polynomial to remainder, so that
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* ECC of blank pages results in 0x0 on reading back
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*/
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for (i = 0; i < chip->ecc.bytes; i++)
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*(ecc_code + i) = *(ecc_code + i) ^
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bch8_polynomial[i];
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ecc_code[i] ^= bch8_polynomial[i];
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break;
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#endif
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case OMAP_ECC_BCH8_CODE_HW:
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ecc_code[chip->ecc.bytes - 1] = 0x00;
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/* Set 14th ECC byte as 0x0 for ROM compatibility */
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ecc_code[chip->ecc.bytes - 1] = 0x0;
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break;
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case OMAP_ECC_BCH16_CODE_HW:
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break;
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@ -350,6 +429,22 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat,
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return 0;
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}
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/**
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* omap_calculate_ecc_bch - ECC generator for 1 sector
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* @mtd: MTD device structure
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* @dat: The pointer to data on which ecc is computed
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* @ecc_code: The ecc_code buffer
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*
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* Support calculating of BCH4/8/16 ECC vectors for one sector. This is used
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* when SW based correction is required as ECC is required for one sector
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* at a time.
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*/
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static int __maybe_unused omap_calculate_ecc_bch(struct mtd_info *mtd,
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const u_char *dat, u_char *ecc_calc)
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{
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return _omap_calculate_ecc_bch(mtd, dat, ecc_calc, 0);
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}
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static inline void omap_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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@ -474,6 +569,35 @@ static void omap_nand_read_prefetch(struct mtd_info *mtd, uint8_t *buf, int len)
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#endif /* CONFIG_NAND_OMAP_GPMC_PREFETCH */
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#ifdef CONFIG_NAND_OMAP_ELM
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/**
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* omap_calculate_ecc_bch_multi - Generate ECC for multiple sectors
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* @mtd: MTD device structure
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* @dat: The pointer to data on which ecc is computed
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* @ecc_code: The ecc_code buffer
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*
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* Support calculating of BCH4/8/16 ecc vectors for the entire page in one go.
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*/
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static int omap_calculate_ecc_bch_multi(struct mtd_info *mtd,
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const u_char *dat, u_char *ecc_calc)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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int eccbytes = chip->ecc.bytes;
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unsigned long nsectors;
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int i, ret;
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nsectors = ((readl(&gpmc_cfg->ecc_config) >> 4) & 0x7) + 1;
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for (i = 0; i < nsectors; i++) {
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ret = _omap_calculate_ecc_bch(mtd, dat, ecc_calc, i);
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if (ret)
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return ret;
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ecc_calc += eccbytes;
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}
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return 0;
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}
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/*
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* omap_reverse_list - re-orders list elements in reverse order [internal]
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* @list: pointer to start of list
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@ -626,52 +750,49 @@ static int omap_read_page_bch(struct mtd_info *mtd, struct nand_chip *chip,
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{
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int i, eccsize = chip->ecc.size;
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int eccbytes = chip->ecc.bytes;
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int ecctotal = chip->ecc.total;
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int eccsteps = chip->ecc.steps;
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uint8_t *p = buf;
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uint8_t *ecc_calc = chip->buffers->ecccalc;
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uint8_t *ecc_code = chip->buffers->ecccode;
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uint32_t *eccpos = chip->ecc.layout->eccpos;
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uint8_t *oob = chip->oob_poi;
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uint32_t data_pos;
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uint32_t oob_pos;
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data_pos = 0;
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/* oob area start */
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oob_pos = (eccsize * eccsteps) + chip->ecc.layout->eccpos[0];
|
||||
oob += chip->ecc.layout->eccpos[0];
|
||||
|
||||
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize,
|
||||
oob += eccbytes) {
|
||||
chip->ecc.hwctl(mtd, NAND_ECC_READ);
|
||||
/* read data */
|
||||
chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_pos, -1);
|
||||
chip->read_buf(mtd, p, eccsize);
|
||||
/* Enable ECC engine */
|
||||
chip->ecc.hwctl(mtd, NAND_ECC_READ);
|
||||
|
||||
/* read respective ecc from oob area */
|
||||
chip->cmdfunc(mtd, NAND_CMD_RNDOUT, oob_pos, -1);
|
||||
chip->read_buf(mtd, oob, eccbytes);
|
||||
/* read syndrome */
|
||||
chip->ecc.calculate(mtd, p, &ecc_calc[i]);
|
||||
/* read entire page */
|
||||
chip->cmdfunc(mtd, NAND_CMD_RNDOUT, 0, -1);
|
||||
chip->read_buf(mtd, buf, mtd->writesize);
|
||||
|
||||
data_pos += eccsize;
|
||||
oob_pos += eccbytes;
|
||||
}
|
||||
/* read all ecc bytes from oob area */
|
||||
chip->cmdfunc(mtd, NAND_CMD_RNDOUT, oob_pos, -1);
|
||||
chip->read_buf(mtd, oob, ecctotal);
|
||||
|
||||
/* Calculate ecc bytes */
|
||||
omap_calculate_ecc_bch_multi(mtd, buf, ecc_calc);
|
||||
|
||||
for (i = 0; i < chip->ecc.total; i++)
|
||||
ecc_code[i] = chip->oob_poi[eccpos[i]];
|
||||
|
||||
/* error detect & correct */
|
||||
eccsteps = chip->ecc.steps;
|
||||
p = buf;
|
||||
|
||||
for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
|
||||
int stat;
|
||||
|
||||
stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
|
||||
if (stat < 0)
|
||||
mtd->ecc_stats.failed++;
|
||||
else
|
||||
mtd->ecc_stats.corrected += stat;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_NAND_OMAP_ELM */
|
||||
@ -819,9 +940,9 @@ static int omap_select_ecc_scheme(struct nand_chip *nand,
|
||||
nand->ecc.strength = 8;
|
||||
nand->ecc.size = SECTOR_BYTES;
|
||||
nand->ecc.bytes = 13;
|
||||
nand->ecc.hwctl = omap_enable_hwecc;
|
||||
nand->ecc.hwctl = omap_enable_hwecc_bch;
|
||||
nand->ecc.correct = omap_correct_data_bch_sw;
|
||||
nand->ecc.calculate = omap_calculate_ecc;
|
||||
nand->ecc.calculate = omap_calculate_ecc_bch;
|
||||
/* define ecc-layout */
|
||||
ecclayout->eccbytes = nand->ecc.bytes * eccsteps;
|
||||
ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
|
||||
@ -860,9 +981,9 @@ static int omap_select_ecc_scheme(struct nand_chip *nand,
|
||||
nand->ecc.strength = 8;
|
||||
nand->ecc.size = SECTOR_BYTES;
|
||||
nand->ecc.bytes = 14;
|
||||
nand->ecc.hwctl = omap_enable_hwecc;
|
||||
nand->ecc.hwctl = omap_enable_hwecc_bch;
|
||||
nand->ecc.correct = omap_correct_data_bch;
|
||||
nand->ecc.calculate = omap_calculate_ecc;
|
||||
nand->ecc.calculate = omap_calculate_ecc_bch;
|
||||
nand->ecc.read_page = omap_read_page_bch;
|
||||
/* define ecc-layout */
|
||||
ecclayout->eccbytes = nand->ecc.bytes * eccsteps;
|
||||
@ -893,9 +1014,9 @@ static int omap_select_ecc_scheme(struct nand_chip *nand,
|
||||
nand->ecc.size = SECTOR_BYTES;
|
||||
nand->ecc.bytes = 26;
|
||||
nand->ecc.strength = 16;
|
||||
nand->ecc.hwctl = omap_enable_hwecc;
|
||||
nand->ecc.hwctl = omap_enable_hwecc_bch;
|
||||
nand->ecc.correct = omap_correct_data_bch;
|
||||
nand->ecc.calculate = omap_calculate_ecc;
|
||||
nand->ecc.calculate = omap_calculate_ecc_bch;
|
||||
nand->ecc.read_page = omap_read_page_bch;
|
||||
/* define ecc-layout */
|
||||
ecclayout->eccbytes = nand->ecc.bytes * eccsteps;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user