mips: octeon: Add cvmx-helper-npi.c
Import cvmx-helper-npi.c from 2013 U-Boot. It will be used by the later added drivers to support networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
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arch/mips/mach-octeon/cvmx-helper-npi.c
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137
arch/mips/mach-octeon/cvmx-helper-npi.c
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018-2022 Marvell International Ltd.
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*
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* Functions for NPI initialization, configuration,
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* and monitoring.
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*/
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#include <time.h>
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#include <log.h>
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#include <linux/delay.h>
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#include <mach/cvmx-regs.h>
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#include <mach/cvmx-csr.h>
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#include <mach/cvmx-bootmem.h>
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#include <mach/octeon-model.h>
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#include <mach/cvmx-fuse.h>
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#include <mach/octeon-feature.h>
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#include <mach/cvmx-qlm.h>
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#include <mach/octeon_qlm.h>
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#include <mach/cvmx-pcie.h>
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#include <mach/cvmx-coremask.h>
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#include <mach/cvmx-agl-defs.h>
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#include <mach/cvmx-bgxx-defs.h>
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#include <mach/cvmx-ciu-defs.h>
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#include <mach/cvmx-gmxx-defs.h>
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#include <mach/cvmx-gserx-defs.h>
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#include <mach/cvmx-ilk-defs.h>
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#include <mach/cvmx-ipd-defs.h>
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#include <mach/cvmx-pexp-defs.h>
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#include <mach/cvmx-pcsx-defs.h>
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#include <mach/cvmx-pcsxx-defs.h>
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#include <mach/cvmx-pki-defs.h>
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#include <mach/cvmx-pko-defs.h>
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#include <mach/cvmx-sli-defs.h>
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#include <mach/cvmx-xcv-defs.h>
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#include <mach/cvmx-hwpko.h>
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#include <mach/cvmx-ilk.h>
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#include <mach/cvmx-pki.h>
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#include <mach/cvmx-helper.h>
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#include <mach/cvmx-helper-board.h>
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#include <mach/cvmx-helper-cfg.h>
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static int cvmx_npi_num_pipes = -1;
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/**
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* @INTERNAL
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* Probe a NPI interface and determine the number of ports
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* connected to it. The NPI interface should still be down
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* after this call.
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*
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* @param interface to probe
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*
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* @return Number of ports on the interface. Zero to disable.
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*/
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int __cvmx_helper_npi_probe(int interface)
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{
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if (OCTEON_IS_MODEL(OCTEON_CN68XX))
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return 32;
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else if (OCTEON_IS_MODEL(OCTEON_CN73XX))
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return 128;
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else if (OCTEON_IS_MODEL(OCTEON_CN78XX))
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return 64;
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return 0;
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}
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/**
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* @INTERNAL
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* Bringup and enable a NPI interface. After this call packet
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* I/O should be fully functional. This is called with IPD
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* enabled but PKO disabled.
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*
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* @param xiface Interface to bring up
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*
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* @return Zero on success, negative on failure
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*/
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int __cvmx_helper_npi_enable(int xiface)
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{
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struct cvmx_xiface xi = cvmx_helper_xiface_to_node_interface(xiface);
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int interface = xi.interface;
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int port;
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int num_ports = cvmx_helper_ports_on_interface(interface);
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/*
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* On CN50XX, CN52XX, and CN56XX we need to disable length
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* checking so packet < 64 bytes and jumbo frames don't get
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* errors.
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*/
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for (port = 0; port < num_ports; port++) {
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union cvmx_pip_prt_cfgx port_cfg;
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int ipd_port =
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(octeon_has_feature(OCTEON_FEATURE_PKND)) ?
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cvmx_helper_get_pknd(interface, port) :
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cvmx_helper_get_ipd_port(interface, port);
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if (octeon_has_feature(OCTEON_FEATURE_PKI)) {
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unsigned int node = cvmx_get_node_num();
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cvmx_pki_endis_l2_errs(node, ipd_port, 0, 0, 0);
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} else {
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port_cfg.u64 = csr_rd(CVMX_PIP_PRT_CFGX(ipd_port));
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port_cfg.s.lenerr_en = 0;
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port_cfg.s.maxerr_en = 0;
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port_cfg.s.minerr_en = 0;
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csr_wr(CVMX_PIP_PRT_CFGX(ipd_port), port_cfg.u64);
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}
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if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
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/* Set up pknd and bpid */
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union cvmx_sli_portx_pkind config;
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config.u64 = csr_rd(CVMX_PEXP_SLI_PORTX_PKIND(port));
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config.s.bpkind = cvmx_helper_get_bpid(interface, port);
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config.s.pkind = cvmx_helper_get_pknd(interface, port);
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csr_wr(CVMX_PEXP_SLI_PORTX_PKIND(port), config.u64);
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}
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}
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if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
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/*
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* Set up pko pipes.
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*/
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union cvmx_sli_tx_pipe config;
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config.u64 = csr_rd(CVMX_PEXP_SLI_TX_PIPE);
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config.s.base = __cvmx_pko_get_pipe(interface, 0);
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config.s.nump =
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cvmx_npi_num_pipes < 0 ? num_ports : cvmx_npi_num_pipes;
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csr_wr(CVMX_PEXP_SLI_TX_PIPE, config.u64);
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}
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/* Enables are controlled by the remote host, so nothing to do here */
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return 0;
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}
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