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i.MX6: arm2: Add AXI cache and Qos setting

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Do the same AXI cache and Qos settings done already in the
SabreLite imximage.cfg for the ARM2 board, too.

It fixes a display flash issue caused by low priority of
the display IDMA channel.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Chen <b02280@freescale.com>
CC: Jason Liu <r64343@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
Acked-by: Jason Liu <r64343@freescale.com>
This commit is contained in:
Dirk Behme 2012-04-12 20:46:14 +00:00 committed by Albert ARIBAUD
parent f5cdc11775
commit 03f3587822
1 changed files with 6 additions and 0 deletions
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6
board/freescale/mx6qarm2/imximage.cfg
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@ -165,3 +165,9 @@ DATA 4 0x020c4074 0x3FF00000
DATA 4 0x020c4078 0x00FFF300
DATA 4 0x020c407c 0x0F0000C3
DATA 4 0x020c4080 0x000003FF
# enable AXI cache for VDOA/VPU/IPU
DATA 4 0x020e0010 0xF00000FF
# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7
DATA 4 0x020e0018 0x007F007F
DATA 4 0x020e001c 0x007F007F