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board/aries: Remove

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The various Aries Embedded boards have been orphaned for a year and no
one has come forward to take care of them.  Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2018-07-02 15:52:50 -04:00
parent 6c88079e24
commit 03b54997d5
40 changed files with 1 additions and 4142 deletions
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4
arch/arm/dts/Makefile
View File

@@ -189,7 +189,6 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_arria5_socdk.dtb \
socfpga_arria10_socdk_sdmmc.dtb \
socfpga_cyclone5_is1.dtb \
socfpga_cyclone5_mcvevk.dtb \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_dbm_soc1.dtb \
socfpga_cyclone5_de0_nano_soc.dtb \
@@ -511,9 +510,6 @@ dtb-$(CONFIG_TARGET_SAMA5D3XEK) += \
dtb-$(CONFIG_TARGET_SAMA5D3_XPLAINED) += \
at91-sama5d3_xplained.dtb
dtb-$(CONFIG_TARGET_MA5D4EK) += \
at91-sama5d4_ma5d4evk.dts.dtb
dtb-$(CONFIG_TARGET_SAMA5D4EK) += \
at91-sama5d4ek.dtb

142
arch/arm/dts/at91-sama5d4_ma5d4.dtsi
View File

@@ -1,142 +0,0 @@
/*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include "sama5d4.dtsi"
/ {
model = "Aries/DENX MA5D4";
compatible = "aries,ma5d4", "denx,ma5d4", "atmel,sama5d4", "atmel,sama5";
memory {
reg = <0x20000000 0x10000000>;
};
clocks {
slow_xtal {
clock-frequency = <32768>;
};
main_xtal {
clock-frequency = <12000000>;
};
clk20m: clk20m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <20000000>;
clock-output-names = "clk20m";
};
};
ahb {
apb {
mmc0: mmc@f8000000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
vmmc-supply = <&vcc_mmc0_reg>;
vqmmc-supply = <&vcc_3v3_reg>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <8>;
broken-cd;
};
};
spi0: spi@f8010000 {
cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
status = "okay";
m25p80@0 {
compatible = "atmel,at25df321a";
spi-max-frequency = <50000000>;
reg = <0>;
};
};
i2c0: i2c@f8014000 {
status = "okay";
};
spi1: spi@fc018000 {
cs-gpios = <&pioB 22 0>, <&pioB 23 0>, <0>, <0>;
status = "okay";
can0: can@0 {
compatible = "microchip,mcp2515";
reg = <0>;
clocks = <&clk20m>;
interrupt-parent = <&pioE>;
interrupts = <6 IRQ_TYPE_EDGE_RISING>;
spi-max-frequency = <10000000>;
};
can1: can@1 {
compatible = "microchip,mcp2515";
reg = <1>;
clocks = <&clk20m>;
interrupt-parent = <&pioE>;
interrupts = <7 IRQ_TYPE_EDGE_RISING>;
spi-max-frequency = <10000000>;
};
};
tcb2: timer@fc024000 {
timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
adc0: adc@fc034000 {
pinctrl-names = "default";
pinctrl-0 = <
/* external trigger conflicts with USBA_VBUS */
&pinctrl_adc0_ad0
&pinctrl_adc0_ad1
&pinctrl_adc0_ad2
&pinctrl_adc0_ad3
&pinctrl_adc0_ad4
>;
atmel,adc-vref = <3300>;
status = "okay";
};
watchdog@fc068640 {
status = "okay";
};
};
};
vcc_3v3_reg: fixedregulator_3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC 3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
vcc_mmc0_reg: fixedregulator_mmc0 {
compatible = "regulator-fixed";
gpio = <&pioE 15 GPIO_ACTIVE_HIGH>;
regulator-name = "RST_n MCI0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_reg>;
regulator-boot-on;
};
};

149
arch/arm/dts/at91-sama5d4_ma5d4evk.dts
View File

@@ -1,149 +0,0 @@
/*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include "at91-sama5d4_ma5d4.dtsi"
/ {
model = "Aries/DENX MA5D4EVK";
compatible = "aries,ma5d4evk", "denx,ma5d4evk", "atmel,sama5d4", "atmel,sama5";
chosen {
stdout-path = "serial3:115200n8";
};
ahb {
apb {
hlcdc: hlcdc@f0000000 {
status = "okay";
hlcdc-display-controller {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
port@0 {
hlcdc_panel_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&panel_input>;
};
};
};
};
macb0: ethernet@f8020000 {
phy-mode = "rmii";
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
usart0: serial@f802c000 {
status = "okay";
};
usart1: serial@f8030000 {
status = "okay";
};
mmc1: mmc@fc000000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
vmmc-supply = <&vcc_mmc1_reg>;
vqmmc-supply = <&vcc_3v3_reg>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioE 5 0>;
};
};
adc0: adc@fc034000 {
atmel,adc-ts-wires = <4>;
atmel,adc-ts-pressure-threshold = <10000>;
};
pinctrl@fc06a000 {
board {
pinctrl_mmc1_cd: mmc1_cd {
atmel,pins = <AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
pinctrl_usba_vbus: usba_vbus {
atmel,pins =
<AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
};
};
};
};
};
backlight: backlight {
compatible = "pwm-backlight";
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
status = "okay";
};
leds {
compatible = "gpio-leds";
status = "okay";
user1 {
label = "user1";
gpios = <&pioD 28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
user2 {
label = "user2";
gpios = <&pioD 29 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
user3 {
label = "user3";
gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
panel: panel {
/* Actually Ampire 800480R2 */
compatible = "foxlink,fl500wvr00-a0t", "simple-panel";
backlight = <&backlight>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
port@0 {
#address-cells = <1>;
#size-cells = <0>;
panel_input: endpoint@0 {
reg = <0>;
remote-endpoint = <&hlcdc_panel_output>;
};
};
};
vcc_mmc1_reg: fixedregulator_mmc1 {
compatible = "regulator-fixed";
gpio = <&pioE 17 GPIO_ACTIVE_LOW>;
regulator-name = "VDD MCI1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_reg>;
};
};

58
arch/arm/dts/socfpga_cyclone5_mcvevk.dts
View File

@@ -1,58 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
*/
#include "socfpga_cyclone5.dtsi"
/ {
model = "Aries MCVEVK";
compatible = "altr,socfpga-cyclone5", "altr,socfpga";
chosen {
bootargs = "console=ttyS0,115200";
};
aliases {
ethernet0 = &gmac0;
udc0 = &usb1;
};
memory {
name = "memory";
device_type = "memory";
reg = <0x0 0x40000000>; /* 1GB */
};
soc {
u-boot,dm-pre-reloc;
};
};
&gmac0 {
status = "okay";
phy-mode = "rgmii";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&mmc0 {
status = "okay";
bus-width = <8>;
u-boot,dm-pre-reloc;
};
&usb1 {
disable-over-current;
status = "okay";
};

9
arch/arm/mach-at91/Kconfig
View File

@@ -197,14 +197,6 @@ config TARGET_SAMA5D4EK
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
config TARGET_MA5D4EVK
bool "Aries MA5D4EVK Evaluation Kit"
select SAMA5D4
select SUPPORT_SPL
select DM
select DM_SPI
select SPI
config TARGET_MEESC
bool "Support meesc"
select AT91SAM9263
@@ -263,7 +255,6 @@ endchoice
config SYS_SOC
default "at91"
source "board/aries/ma5d4evk/Kconfig"
source "board/atmel/at91rm9200ek/Kconfig"
source "board/atmel/at91sam9260ek/Kconfig"
source "board/atmel/at91sam9261ek/Kconfig"

6
arch/arm/mach-imx/mx5/Kconfig
View File

@@ -29,11 +29,6 @@ config TARGET_KP_IMX53
select DM_GPIO
select DM_PMIC
config TARGET_M53EVK
bool "Support m53evk"
select MX53
select SUPPORT_SPL
config TARGET_MX51EVK
bool "Support mx51evk"
select BOARD_LATE_INIT
@@ -83,7 +78,6 @@ endchoice
config SYS_SOC
default "mx5"
source "board/aries/m53evk/Kconfig"
source "board/beckhoff/mx53cx9020/Kconfig"
source "board/freescale/mx51evk/Kconfig"
source "board/freescale/mx53ard/Kconfig"

1
arch/arm/mach-imx/mx5/Makefile
View File

@@ -9,6 +9,5 @@ obj-y := soc.o clock.o
obj-y += lowlevel_init.o
# common files for mx53 dram initialization
obj-$(CONFIG_TARGET_M53EVK) += mx53_dram.o
obj-$(CONFIG_TARGET_MX53CX9020) += mx53_dram.o
obj-$(CONFIG_TARGET_MX53LOCO) += mx53_dram.o

4
arch/arm/mach-imx/mxs/Kconfig
View File

@@ -50,9 +50,6 @@ config TARGET_APX4DEVKIT
config TARGET_BG0900
bool "Support bg0900"
config TARGET_M28EVK
bool "Support m28evk"
config TARGET_MX28EVK
bool "Support mx28evk"
select BOARD_EARLY_INIT_F
@@ -68,7 +65,6 @@ endchoice
config SYS_SOC
default "mxs"
source "board/aries/m28evk/Kconfig"
source "board/bluegiga/apx4devkit/Kconfig"
source "board/freescale/mx28evk/Kconfig"
source "board/ppcag/bg0900/Kconfig"

7
arch/arm/mach-socfpga/Kconfig
View File

@@ -36,10 +36,6 @@ config TARGET_SOCFPGA_CYCLONE5_SOCDK
bool "Altera SOCFPGA SoCDK (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
config TARGET_SOCFPGA_ARIES_MCVEVK
bool "Aries MCVEVK (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
config TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1
bool "Devboards DBM-SoC1 (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
@@ -88,7 +84,6 @@ config SYS_BOARD
default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO
default "is1" if TARGET_SOCFPGA_IS1
default "mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK
default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
default "sr1500" if TARGET_SOCFPGA_SR1500
@@ -98,7 +93,6 @@ config SYS_VENDOR
default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK
default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK
default "devboards" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1
default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
@@ -119,7 +113,6 @@ config SYS_CONFIG_NAME
default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
default "socfpga_de10_nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO
default "socfpga_is1" if TARGET_SOCFPGA_IS1
default "socfpga_mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK
default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500