board: axs10x - support v3 mother-board

There're 2 versions of motherboards that could be used in ARC SDP.
The only important difference for U-Boot is different NAND IC in use:
 [1] v2 board (we used to support up until now) sports MT29F4G08ABADAWP
while
 [2] v3 board sports MT29F4G16ABADAWP

They are almost the same except data bus width 8-bit in [1] and 16-bit
in [2]. And for proper support of 16-bit data bus we have to pass
NAND_BUSWIDTH_16 option to NAND driver core - which we do now knowing
board type we're running on.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This commit is contained in:
Alexey Brodkin 2015-04-09 19:50:58 +03:00
parent 385a08a60f
commit 0241c3131d
4 changed files with 43 additions and 0 deletions

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@ -9,6 +9,7 @@
#include <malloc.h>
#include <netdev.h>
#include <phy.h>
#include "axs10x.h"
DECLARE_GLOBAL_DATA_PTR;
@ -42,3 +43,16 @@ int board_eth_init(bd_t *bis)
return 0;
}
#define AXS_MB_CREG 0xE0011000
int board_early_init_f(void)
{
if (readl((void __iomem *)AXS_MB_CREG + 0x234) & (1 << 28))
gd->board_type = AXS_MB_V3;
else
gd->board_type = AXS_MB_V2;
return 0;
}

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@ -0,0 +1,16 @@
/*
* Copyright (C) 2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _BOARD_SYNOPSYS_AXS10X_H
#define _BOARD_SYNOPSYS_AXS10X_H
enum {
AXS_MB_V2,
AXS_MB_V3
};
#endif /* _BOARD_SYNOPSYS_AXS10X_H */

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@ -9,6 +9,9 @@
#include <malloc.h>
#include <nand.h>
#include <asm/io.h>
#include "axs10x.h"
DECLARE_GLOBAL_DATA_PTR;
#define BUS_WIDTH 8 /* AXI data bus width in bytes */
@ -232,5 +235,9 @@ int board_nand_init(struct nand_chip *nand)
nand->write_buf = axs101_nand_write_buf;
nand->read_buf = axs101_nand_read_buf;
/* MBv3 has NAND IC with 16-bit data bus */
if (gd->board_type == AXS_MB_V3)
nand->options |= NAND_BUSWIDTH_16;
return 0;
}

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@ -33,6 +33,12 @@
#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */
#define CONFIG_SYS_LOAD_ADDR 0x82000000
/*
* This board might be of different versions so handle it
*/
#define CONFIG_BOARD_TYPES
#define CONFIG_BOARD_EARLY_INIT_F
/*
* NAND Flash configuration
*/