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Merge branch 'master' of git://git.denx.de/u-boot-net

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This commit is contained in:
Tom Rini
2018-10-11 15:28:32 -04:00
parent 3d5ced9e22 1a048cd656
commit 0223462b37
39 changed files with 1294 additions and 409 deletions
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1
board/Synology/ds414/cmd_syno.c
View File

@@ -14,7 +14,6 @@
#include <asm/io.h>
#include "../drivers/ddr/marvell/axp/ddr3_init.h"
#define ETH_ALEN 6
#define ETHADDR_MAX 4
#define SYNO_SN_TAG "SN="
#define SYNO_CHKSUM_TAG "CHK="

18
board/freescale/ls1088a/eth_ls1088aqds.c
View File

@@ -487,16 +487,16 @@ void ls1088a_handle_phy_interface_sgmii(int dpmac_id)
case 0x3A:
switch (dpmac_id) {
case 1:
wriop_set_phy_address(dpmac_id, riser_phy_addr[1]);
wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[1]);
break;
case 2:
wriop_set_phy_address(dpmac_id, riser_phy_addr[0]);
wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[0]);
break;
case 3:
wriop_set_phy_address(dpmac_id, riser_phy_addr[3]);
wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[3]);
break;
case 7:
wriop_set_phy_address(dpmac_id, riser_phy_addr[2]);
wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[2]);
break;
default:
printf("WRIOP: Wrong DPMAC%d set to SGMII", dpmac_id);
@@ -532,13 +532,13 @@ void ls1088a_handle_phy_interface_qsgmii(int dpmac_id)
case 4:
case 5:
case 6:
wriop_set_phy_address(dpmac_id, dpmac_id + 9);
wriop_set_phy_address(dpmac_id, 0, dpmac_id + 9);
break;
case 7:
case 8:
case 9:
case 10:
wriop_set_phy_address(dpmac_id, dpmac_id + 1);
wriop_set_phy_address(dpmac_id, 0, dpmac_id + 1);
break;
}
@@ -567,7 +567,7 @@ void ls1088a_handle_phy_interface_xsgmii(int i)
case 0x15:
case 0x1D:
case 0x1E:
wriop_set_phy_address(i, i + 26);
wriop_set_phy_address(i, 0, i + 26);
ls1088a_qds_enable_SFP_TX(SFP_TX);
break;
default:
@@ -590,13 +590,13 @@ static void ls1088a_handle_phy_interface_rgmii(int dpmac_id)
switch (dpmac_id) {
case 4:
wriop_set_phy_address(dpmac_id, RGMII_PHY1_ADDR);
wriop_set_phy_address(dpmac_id, 0, RGMII_PHY1_ADDR);
dpmac_info[dpmac_id].board_mux = EMI1_RGMII1;
bus = mii_dev_for_muxval(EMI1_RGMII1);
wriop_set_mdio(dpmac_id, bus);
break;
case 5:
wriop_set_phy_address(dpmac_id, RGMII_PHY2_ADDR);
wriop_set_phy_address(dpmac_id, 0, RGMII_PHY2_ADDR);
dpmac_info[dpmac_id].board_mux = EMI1_RGMII2;
bus = mii_dev_for_muxval(EMI1_RGMII2);
wriop_set_mdio(dpmac_id, bus);

21
board/freescale/ls1088a/eth_ls1088ardb.c
View File

@@ -55,16 +55,17 @@ int board_eth_init(bd_t *bis)
* a MAC has no PHY address, we give a PHY address to XFI
* MAC error.
*/
wriop_set_phy_address(WRIOP1_DPMAC1, 0x0a);
wriop_set_phy_address(WRIOP1_DPMAC2, AQ_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC3, QSGMII1_PORT1_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC4, QSGMII1_PORT2_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC5, QSGMII1_PORT3_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC6, QSGMII1_PORT4_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC7, QSGMII2_PORT1_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC8, QSGMII2_PORT2_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC9, QSGMII2_PORT3_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC10, QSGMII2_PORT4_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC1, 0, 0x0a);
wriop_set_phy_address(WRIOP1_DPMAC2, 0, AQ_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC3, 0, QSGMII1_PORT1_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC4, 0, QSGMII1_PORT2_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC5, 0, QSGMII1_PORT3_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC6, 0, QSGMII1_PORT4_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC7, 0, QSGMII2_PORT1_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC8, 0, QSGMII2_PORT2_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC9, 0, QSGMII2_PORT3_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC10, 0,
QSGMII2_PORT4_PHY_ADDR);
break;
default:

26
board/freescale/ls2080aqds/eth.c
View File

@@ -623,7 +623,7 @@ void ls2080a_handle_phy_interface_sgmii(int dpmac_id)
switch (++slot) {
case 1:
/* Slot housing a SGMII riser card? */
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 1]);
dpmac_info[dpmac_id].board_mux = EMI1_SLOT1;
bus = mii_dev_for_muxval(EMI1_SLOT1);
@@ -631,7 +631,7 @@ void ls2080a_handle_phy_interface_sgmii(int dpmac_id)
break;
case 2:
/* Slot housing a SGMII riser card? */
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 1]);
dpmac_info[dpmac_id].board_mux = EMI1_SLOT2;
bus = mii_dev_for_muxval(EMI1_SLOT2);
@@ -641,18 +641,18 @@ void ls2080a_handle_phy_interface_sgmii(int dpmac_id)
if (slot == EMI_NONE)
return;
if (serdes1_prtcl == 0x39) {
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 2]);
if (dpmac_id >= 6 && hwconfig_f("xqsgmii",
env_hwconfig))
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 3]);
} else {
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 2]);
if (dpmac_id >= 7 && hwconfig_f("xqsgmii",
env_hwconfig))
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 3]);
}
dpmac_info[dpmac_id].board_mux = EMI1_SLOT3;
@@ -691,7 +691,7 @@ serdes2:
break;
case 4:
/* Slot housing a SGMII riser card? */
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 9]);
dpmac_info[dpmac_id].board_mux = EMI1_SLOT4;
bus = mii_dev_for_muxval(EMI1_SLOT4);
@@ -701,14 +701,14 @@ serdes2:
if (slot == EMI_NONE)
return;
if (serdes2_prtcl == 0x47) {
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 10]);
if (dpmac_id >= 14 && hwconfig_f("xqsgmii",
env_hwconfig))
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 11]);
} else {
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 11]);
}
dpmac_info[dpmac_id].board_mux = EMI1_SLOT5;
@@ -717,7 +717,7 @@ serdes2:
break;
case 6:
/* Slot housing a SGMII riser card? */
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 13]);
dpmac_info[dpmac_id].board_mux = EMI1_SLOT6;
bus = mii_dev_for_muxval(EMI1_SLOT6);
@@ -775,7 +775,7 @@ void ls2080a_handle_phy_interface_qsgmii(int dpmac_id)
switch (++slot) {
case 1:
/* Slot housing a QSGMII riser card? */
wriop_set_phy_address(dpmac_id, dpmac_id - 1);
wriop_set_phy_address(dpmac_id, 0, dpmac_id - 1);
dpmac_info[dpmac_id].board_mux = EMI1_SLOT1;
bus = mii_dev_for_muxval(EMI1_SLOT1);
wriop_set_mdio(dpmac_id, bus);
@@ -819,7 +819,7 @@ void ls2080a_handle_phy_interface_xsgmii(int i)
* the XAUI card is used for the XFI MAC, which will cause
* error.
*/
wriop_set_phy_address(i, i + 4);
wriop_set_phy_address(i, 0, i + 4);
ls2080a_qds_enable_SFP_TX(SFP_TX);
break;

24
board/freescale/ls2080ardb/eth_ls2080rdb.c
View File

@@ -50,21 +50,21 @@ int board_eth_init(bd_t *bis)
switch (srds_s1) {
case 0x2A:
wriop_set_phy_address(WRIOP1_DPMAC1, CORTINA_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC2, CORTINA_PHY_ADDR2);
wriop_set_phy_address(WRIOP1_DPMAC3, CORTINA_PHY_ADDR3);
wriop_set_phy_address(WRIOP1_DPMAC4, CORTINA_PHY_ADDR4);
wriop_set_phy_address(WRIOP1_DPMAC5, AQ_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC6, AQ_PHY_ADDR2);
wriop_set_phy_address(WRIOP1_DPMAC7, AQ_PHY_ADDR3);
wriop_set_phy_address(WRIOP1_DPMAC8, AQ_PHY_ADDR4);
wriop_set_phy_address(WRIOP1_DPMAC1, 0, CORTINA_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC2, 0, CORTINA_PHY_ADDR2);
wriop_set_phy_address(WRIOP1_DPMAC3, 0, CORTINA_PHY_ADDR3);
wriop_set_phy_address(WRIOP1_DPMAC4, 0, CORTINA_PHY_ADDR4);
wriop_set_phy_address(WRIOP1_DPMAC5, 0, AQ_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC6, 0, AQ_PHY_ADDR2);
wriop_set_phy_address(WRIOP1_DPMAC7, 0, AQ_PHY_ADDR3);
wriop_set_phy_address(WRIOP1_DPMAC8, 0, AQ_PHY_ADDR4);
break;
case 0x4B:
wriop_set_phy_address(WRIOP1_DPMAC1, CORTINA_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC2, CORTINA_PHY_ADDR2);
wriop_set_phy_address(WRIOP1_DPMAC3, CORTINA_PHY_ADDR3);
wriop_set_phy_address(WRIOP1_DPMAC4, CORTINA_PHY_ADDR4);
wriop_set_phy_address(WRIOP1_DPMAC1, 0, CORTINA_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC2, 0, CORTINA_PHY_ADDR2);
wriop_set_phy_address(WRIOP1_DPMAC3, 0, CORTINA_PHY_ADDR3);
wriop_set_phy_address(WRIOP1_DPMAC4, 0, CORTINA_PHY_ADDR4);
break;
default: