2021-06-02 08:13:46 +00:00
|
|
|
CONFIG_ARM=y
|
2021-08-28 01:18:30 +00:00
|
|
|
CONFIG_SKIP_LOWLEVEL_INIT=y
|
2021-06-02 08:13:46 +00:00
|
|
|
CONFIG_ARCH_ROCKCHIP=y
|
|
|
|
|
CONFIG_SYS_TEXT_BASE=0x00a00000
|
|
|
|
|
CONFIG_NR_DRAM_BANKS=2
|
2021-07-08 11:54:35 +00:00
|
|
|
CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
|
2021-06-02 08:13:46 +00:00
|
|
|
CONFIG_ROCKCHIP_RK3568=y
|
|
|
|
|
CONFIG_TARGET_EVB_RK3568=y
|
|
|
|
|
CONFIG_DEBUG_UART_BASE=0xFE660000
|
|
|
|
|
CONFIG_DEBUG_UART_CLOCK=24000000
|
|
|
|
|
CONFIG_DEBUG_UART=y
|
2021-08-23 14:25:31 +00:00
|
|
|
CONFIG_SYS_LOAD_ADDR=0xc00800
|
2021-06-02 08:13:46 +00:00
|
|
|
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb"
|
|
|
|
|
# CONFIG_DISPLAY_CPUINFO is not set
|
|
|
|
|
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
|
|
|
CONFIG_CMD_GPT=y
|
|
|
|
|
CONFIG_CMD_MMC=y
|
|
|
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
|
|
|
CONFIG_NET_RANDOM_ETHADDR=y
|
|
|
|
|
CONFIG_ROCKCHIP_GPIO=y
|
|
|
|
|
CONFIG_SYS_I2C_ROCKCHIP=y
|
|
|
|
|
CONFIG_MISC=y
|
|
|
|
|
CONFIG_MMC_DW=y
|
|
|
|
|
CONFIG_MMC_DW_ROCKCHIP=y
|
|
|
|
|
CONFIG_MMC_SDHCI=y
|
|
|
|
|
CONFIG_MMC_SDHCI_SDMA=y
|
|
|
|
|
CONFIG_MMC_SDHCI_ROCKCHIP=y
|
|
|
|
|
CONFIG_DM_ETH=y
|
|
|
|
|
CONFIG_ETH_DESIGNWARE=y
|
|
|
|
|
CONFIG_GMAC_ROCKCHIP=y
|
|
|
|
|
CONFIG_REGULATOR_PWM=y
|
|
|
|
|
CONFIG_PWM_ROCKCHIP=y
|
|
|
|
|
CONFIG_DM_RESET=y
|
|
|
|
|
CONFIG_BAUDRATE=1500000
|
|
|
|
|
CONFIG_DEBUG_UART_SHIFT=2
|
|
|
|
|
CONFIG_SYSRESET=y
|
|
|
|
|
CONFIG_ERRNO_STR=y
|
