2015-09-01 22:41:52 +00:00
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CONFIG_ARM=y
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CONFIG_ARCH_SOCFPGA=y
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2015-09-28 12:14:15 +00:00
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_SPL_DM=y
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CONFIG_DM_GPIO=y
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2015-09-01 22:41:52 +00:00
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CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
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2015-11-11 13:39:33 +00:00
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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2015-09-01 22:41:52 +00:00
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc"
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CONFIG_SPL=y
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2015-09-28 12:14:15 +00:00
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CONFIG_SPL_STACK_R=y
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2016-02-23 05:55:43 +00:00
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CONFIG_FIT=y
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2015-09-01 22:41:52 +00:00
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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2015-11-11 13:39:33 +00:00
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CONFIG_CMD_GPIO=y
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2015-09-28 12:14:15 +00:00
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CONFIG_DWAPB_GPIO=y
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2016-02-23 05:55:40 +00:00
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CONFIG_DM_MMC=y
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2015-09-01 22:41:52 +00:00
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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2015-11-19 13:48:14 +00:00
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CONFIG_SYS_NS16550=y
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2015-11-25 13:34:53 +00:00
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CONFIG_CADENCE_QSPI=y
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CONFIG_DESIGNWARE_SPI=y
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2015-12-05 18:24:22 +00:00
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CONFIG_USB=y
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CONFIG_DM_USB=y
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