forked from Minki/linux
24f48a4203
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
1768 lines
44 KiB
C
1768 lines
44 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <linux/ratelimit.h>
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#include <linux/printk.h>
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <linux/types.h>
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#include <linux/bitops.h>
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#include <linux/sched.h>
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#include "kfd_priv.h"
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#include "kfd_device_queue_manager.h"
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#include "kfd_mqd_manager.h"
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#include "cik_regs.h"
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#include "kfd_kernel_queue.h"
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/* Size of the per-pipe EOP queue */
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#define CIK_HPD_EOP_BYTES_LOG2 11
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#define CIK_HPD_EOP_BYTES (1U << CIK_HPD_EOP_BYTES_LOG2)
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static int set_pasid_vmid_mapping(struct device_queue_manager *dqm,
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unsigned int pasid, unsigned int vmid);
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static int create_compute_queue_nocpsch(struct device_queue_manager *dqm,
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struct queue *q,
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struct qcm_process_device *qpd);
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static int execute_queues_cpsch(struct device_queue_manager *dqm,
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enum kfd_unmap_queues_filter filter,
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uint32_t filter_param);
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static int unmap_queues_cpsch(struct device_queue_manager *dqm,
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enum kfd_unmap_queues_filter filter,
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uint32_t filter_param);
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static int map_queues_cpsch(struct device_queue_manager *dqm);
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static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
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struct queue *q,
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struct qcm_process_device *qpd);
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static void deallocate_sdma_queue(struct device_queue_manager *dqm,
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unsigned int sdma_queue_id);
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static inline
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enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type)
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{
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if (type == KFD_QUEUE_TYPE_SDMA)
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return KFD_MQD_TYPE_SDMA;
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return KFD_MQD_TYPE_CP;
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}
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static bool is_pipe_enabled(struct device_queue_manager *dqm, int mec, int pipe)
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{
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int i;
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int pipe_offset = mec * dqm->dev->shared_resources.num_pipe_per_mec
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+ pipe * dqm->dev->shared_resources.num_queue_per_pipe;
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/* queue is available for KFD usage if bit is 1 */
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for (i = 0; i < dqm->dev->shared_resources.num_queue_per_pipe; ++i)
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if (test_bit(pipe_offset + i,
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dqm->dev->shared_resources.queue_bitmap))
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return true;
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return false;
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}
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unsigned int get_queues_num(struct device_queue_manager *dqm)
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{
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return bitmap_weight(dqm->dev->shared_resources.queue_bitmap,
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KGD_MAX_QUEUES);
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}
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unsigned int get_queues_per_pipe(struct device_queue_manager *dqm)
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{
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return dqm->dev->shared_resources.num_queue_per_pipe;
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}
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unsigned int get_pipes_per_mec(struct device_queue_manager *dqm)
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{
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return dqm->dev->shared_resources.num_pipe_per_mec;
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}
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void program_sh_mem_settings(struct device_queue_manager *dqm,
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struct qcm_process_device *qpd)
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{
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return dqm->dev->kfd2kgd->program_sh_mem_settings(
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dqm->dev->kgd, qpd->vmid,
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qpd->sh_mem_config,
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qpd->sh_mem_ape1_base,
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qpd->sh_mem_ape1_limit,
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qpd->sh_mem_bases);
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}
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static int allocate_doorbell(struct qcm_process_device *qpd, struct queue *q)
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{
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struct kfd_dev *dev = qpd->dqm->dev;
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if (!KFD_IS_SOC15(dev->device_info->asic_family)) {
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/* On pre-SOC15 chips we need to use the queue ID to
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* preserve the user mode ABI.
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*/
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q->doorbell_id = q->properties.queue_id;
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} else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
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/* For SDMA queues on SOC15, use static doorbell
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* assignments based on the engine and queue.
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*/
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q->doorbell_id = dev->shared_resources.sdma_doorbell
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[q->properties.sdma_engine_id]
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[q->properties.sdma_queue_id];
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} else {
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/* For CP queues on SOC15 reserve a free doorbell ID */
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unsigned int found;
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found = find_first_zero_bit(qpd->doorbell_bitmap,
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KFD_MAX_NUM_OF_QUEUES_PER_PROCESS);
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if (found >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) {
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pr_debug("No doorbells available");
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return -EBUSY;
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}
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set_bit(found, qpd->doorbell_bitmap);
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q->doorbell_id = found;
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}
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q->properties.doorbell_off =
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kfd_doorbell_id_to_offset(dev, q->process,
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q->doorbell_id);
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return 0;
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}
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static void deallocate_doorbell(struct qcm_process_device *qpd,
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struct queue *q)
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{
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unsigned int old;
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struct kfd_dev *dev = qpd->dqm->dev;
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if (!KFD_IS_SOC15(dev->device_info->asic_family) ||
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q->properties.type == KFD_QUEUE_TYPE_SDMA)
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return;
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old = test_and_clear_bit(q->doorbell_id, qpd->doorbell_bitmap);
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WARN_ON(!old);
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}
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static int allocate_vmid(struct device_queue_manager *dqm,
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struct qcm_process_device *qpd,
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struct queue *q)
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{
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int bit, allocated_vmid;
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if (dqm->vmid_bitmap == 0)
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return -ENOMEM;
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bit = ffs(dqm->vmid_bitmap) - 1;
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dqm->vmid_bitmap &= ~(1 << bit);
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allocated_vmid = bit + dqm->dev->vm_info.first_vmid_kfd;
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pr_debug("vmid allocation %d\n", allocated_vmid);
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qpd->vmid = allocated_vmid;
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q->properties.vmid = allocated_vmid;
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set_pasid_vmid_mapping(dqm, q->process->pasid, q->properties.vmid);
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program_sh_mem_settings(dqm, qpd);
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/* qpd->page_table_base is set earlier when register_process()
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* is called, i.e. when the first queue is created.
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*/
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dqm->dev->kfd2kgd->set_vm_context_page_table_base(dqm->dev->kgd,
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qpd->vmid,
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qpd->page_table_base);
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/* invalidate the VM context after pasid and vmid mapping is set up */
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kfd_flush_tlb(qpd_to_pdd(qpd));
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return 0;
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}
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static int flush_texture_cache_nocpsch(struct kfd_dev *kdev,
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struct qcm_process_device *qpd)
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{
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const struct packet_manager_funcs *pmf = qpd->dqm->packets.pmf;
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int ret;
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if (!qpd->ib_kaddr)
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return -ENOMEM;
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ret = pmf->release_mem(qpd->ib_base, (uint32_t *)qpd->ib_kaddr);
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if (ret)
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return ret;
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return kdev->kfd2kgd->submit_ib(kdev->kgd, KGD_ENGINE_MEC1, qpd->vmid,
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qpd->ib_base, (uint32_t *)qpd->ib_kaddr,
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pmf->release_mem_size / sizeof(uint32_t));
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}
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static void deallocate_vmid(struct device_queue_manager *dqm,
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struct qcm_process_device *qpd,
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struct queue *q)
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{
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int bit = qpd->vmid - dqm->dev->vm_info.first_vmid_kfd;
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/* On GFX v7, CP doesn't flush TC at dequeue */
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if (q->device->device_info->asic_family == CHIP_HAWAII)
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if (flush_texture_cache_nocpsch(q->device, qpd))
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pr_err("Failed to flush TC\n");
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kfd_flush_tlb(qpd_to_pdd(qpd));
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/* Release the vmid mapping */
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set_pasid_vmid_mapping(dqm, 0, qpd->vmid);
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dqm->vmid_bitmap |= (1 << bit);
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qpd->vmid = 0;
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q->properties.vmid = 0;
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}
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static int create_queue_nocpsch(struct device_queue_manager *dqm,
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struct queue *q,
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struct qcm_process_device *qpd)
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{
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int retval;
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print_queue(q);
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mutex_lock(&dqm->lock);
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if (dqm->total_queue_count >= max_num_of_queues_per_device) {
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pr_warn("Can't create new usermode queue because %d queues were already created\n",
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dqm->total_queue_count);
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retval = -EPERM;
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goto out_unlock;
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}
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if (list_empty(&qpd->queues_list)) {
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retval = allocate_vmid(dqm, qpd, q);
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if (retval)
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goto out_unlock;
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}
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q->properties.vmid = qpd->vmid;
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/*
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* Eviction state logic: we only mark active queues as evicted
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* to avoid the overhead of restoring inactive queues later
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*/
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if (qpd->evicted)
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q->properties.is_evicted = (q->properties.queue_size > 0 &&
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q->properties.queue_percent > 0 &&
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q->properties.queue_address != 0);
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q->properties.tba_addr = qpd->tba_addr;
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q->properties.tma_addr = qpd->tma_addr;
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if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE)
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retval = create_compute_queue_nocpsch(dqm, q, qpd);
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else if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
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retval = create_sdma_queue_nocpsch(dqm, q, qpd);
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else
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retval = -EINVAL;
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if (retval) {
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if (list_empty(&qpd->queues_list))
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deallocate_vmid(dqm, qpd, q);
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goto out_unlock;
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}
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list_add(&q->list, &qpd->queues_list);
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qpd->queue_count++;
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if (q->properties.is_active)
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dqm->queue_count++;
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if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
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dqm->sdma_queue_count++;
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/*
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* Unconditionally increment this counter, regardless of the queue's
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* type or whether the queue is active.
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*/
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dqm->total_queue_count++;
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pr_debug("Total of %d queues are accountable so far\n",
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dqm->total_queue_count);
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out_unlock:
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mutex_unlock(&dqm->lock);
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return retval;
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}
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static int allocate_hqd(struct device_queue_manager *dqm, struct queue *q)
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{
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bool set;
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int pipe, bit, i;
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set = false;
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for (pipe = dqm->next_pipe_to_allocate, i = 0;
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i < get_pipes_per_mec(dqm);
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pipe = ((pipe + 1) % get_pipes_per_mec(dqm)), ++i) {
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if (!is_pipe_enabled(dqm, 0, pipe))
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continue;
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if (dqm->allocated_queues[pipe] != 0) {
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bit = ffs(dqm->allocated_queues[pipe]) - 1;
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dqm->allocated_queues[pipe] &= ~(1 << bit);
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q->pipe = pipe;
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q->queue = bit;
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set = true;
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break;
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}
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}
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if (!set)
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return -EBUSY;
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pr_debug("hqd slot - pipe %d, queue %d\n", q->pipe, q->queue);
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/* horizontal hqd allocation */
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dqm->next_pipe_to_allocate = (pipe + 1) % get_pipes_per_mec(dqm);
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return 0;
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}
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static inline void deallocate_hqd(struct device_queue_manager *dqm,
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struct queue *q)
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{
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dqm->allocated_queues[q->pipe] |= (1 << q->queue);
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}
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static int create_compute_queue_nocpsch(struct device_queue_manager *dqm,
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struct queue *q,
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struct qcm_process_device *qpd)
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{
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int retval;
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struct mqd_manager *mqd;
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mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE);
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if (!mqd)
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return -ENOMEM;
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retval = allocate_hqd(dqm, q);
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if (retval)
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return retval;
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retval = allocate_doorbell(qpd, q);
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if (retval)
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goto out_deallocate_hqd;
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retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
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&q->gart_mqd_addr, &q->properties);
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if (retval)
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goto out_deallocate_doorbell;
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pr_debug("Loading mqd to hqd on pipe %d, queue %d\n",
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q->pipe, q->queue);
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dqm->dev->kfd2kgd->set_scratch_backing_va(
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dqm->dev->kgd, qpd->sh_hidden_private_base, qpd->vmid);
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if (!q->properties.is_active)
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return 0;
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retval = mqd->load_mqd(mqd, q->mqd, q->pipe, q->queue, &q->properties,
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q->process->mm);
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if (retval)
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goto out_uninit_mqd;
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return 0;
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out_uninit_mqd:
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mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
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out_deallocate_doorbell:
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deallocate_doorbell(qpd, q);
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out_deallocate_hqd:
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deallocate_hqd(dqm, q);
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return retval;
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}
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|
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/* Access to DQM has to be locked before calling destroy_queue_nocpsch_locked
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* to avoid asynchronized access
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*/
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static int destroy_queue_nocpsch_locked(struct device_queue_manager *dqm,
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struct qcm_process_device *qpd,
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struct queue *q)
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{
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int retval;
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struct mqd_manager *mqd;
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mqd = dqm->ops.get_mqd_manager(dqm,
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get_mqd_type_from_queue_type(q->properties.type));
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if (!mqd)
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return -ENOMEM;
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|
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if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE) {
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deallocate_hqd(dqm, q);
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} else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
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dqm->sdma_queue_count--;
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deallocate_sdma_queue(dqm, q->sdma_id);
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} else {
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pr_debug("q->properties.type %d is invalid\n",
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q->properties.type);
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return -EINVAL;
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}
|
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dqm->total_queue_count--;
|
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|
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deallocate_doorbell(qpd, q);
|
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|
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retval = mqd->destroy_mqd(mqd, q->mqd,
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KFD_PREEMPT_TYPE_WAVEFRONT_RESET,
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KFD_UNMAP_LATENCY_MS,
|
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q->pipe, q->queue);
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if (retval == -ETIME)
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qpd->reset_wavefronts = true;
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|
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mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
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|
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list_del(&q->list);
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if (list_empty(&qpd->queues_list)) {
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if (qpd->reset_wavefronts) {
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pr_warn("Resetting wave fronts (nocpsch) on dev %p\n",
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dqm->dev);
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/* dbgdev_wave_reset_wavefronts has to be called before
|
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* deallocate_vmid(), i.e. when vmid is still in use.
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*/
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dbgdev_wave_reset_wavefronts(dqm->dev,
|
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qpd->pqm->process);
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qpd->reset_wavefronts = false;
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}
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deallocate_vmid(dqm, qpd, q);
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}
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qpd->queue_count--;
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if (q->properties.is_active)
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dqm->queue_count--;
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return retval;
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}
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|
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static int destroy_queue_nocpsch(struct device_queue_manager *dqm,
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struct qcm_process_device *qpd,
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struct queue *q)
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{
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int retval;
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mutex_lock(&dqm->lock);
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retval = destroy_queue_nocpsch_locked(dqm, qpd, q);
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mutex_unlock(&dqm->lock);
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return retval;
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}
|
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|
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static int update_queue(struct device_queue_manager *dqm, struct queue *q)
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|
{
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int retval;
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struct mqd_manager *mqd;
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struct kfd_process_device *pdd;
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bool prev_active = false;
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|
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mutex_lock(&dqm->lock);
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pdd = kfd_get_process_device_data(q->device, q->process);
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if (!pdd) {
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retval = -ENODEV;
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goto out_unlock;
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}
|
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mqd = dqm->ops.get_mqd_manager(dqm,
|
|
get_mqd_type_from_queue_type(q->properties.type));
|
|
if (!mqd) {
|
|
retval = -ENOMEM;
|
|
goto out_unlock;
|
|
}
|
|
/*
|
|
* Eviction state logic: we only mark active queues as evicted
|
|
* to avoid the overhead of restoring inactive queues later
|
|
*/
|
|
if (pdd->qpd.evicted)
|
|
q->properties.is_evicted = (q->properties.queue_size > 0 &&
|
|
q->properties.queue_percent > 0 &&
|
|
q->properties.queue_address != 0);
|
|
|
|
/* Save previous activity state for counters */
|
|
prev_active = q->properties.is_active;
|
|
|
|
/* Make sure the queue is unmapped before updating the MQD */
|
|
if (dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) {
|
|
retval = unmap_queues_cpsch(dqm,
|
|
KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
|
|
if (retval) {
|
|
pr_err("unmap queue failed\n");
|
|
goto out_unlock;
|
|
}
|
|
} else if (prev_active &&
|
|
(q->properties.type == KFD_QUEUE_TYPE_COMPUTE ||
|
|
q->properties.type == KFD_QUEUE_TYPE_SDMA)) {
|
|
retval = mqd->destroy_mqd(mqd, q->mqd,
|
|
KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN,
|
|
KFD_UNMAP_LATENCY_MS, q->pipe, q->queue);
|
|
if (retval) {
|
|
pr_err("destroy mqd failed\n");
|
|
goto out_unlock;
|
|
}
|
|
}
|
|
|
|
retval = mqd->update_mqd(mqd, q->mqd, &q->properties);
|
|
|
|
/*
|
|
* check active state vs. the previous state and modify
|
|
* counter accordingly. map_queues_cpsch uses the
|
|
* dqm->queue_count to determine whether a new runlist must be
|
|
* uploaded.
|
|
*/
|
|
if (q->properties.is_active && !prev_active)
|
|
dqm->queue_count++;
|
|
else if (!q->properties.is_active && prev_active)
|
|
dqm->queue_count--;
|
|
|
|
if (dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS)
|
|
retval = map_queues_cpsch(dqm);
|
|
else if (q->properties.is_active &&
|
|
(q->properties.type == KFD_QUEUE_TYPE_COMPUTE ||
|
|
q->properties.type == KFD_QUEUE_TYPE_SDMA))
|
|
retval = mqd->load_mqd(mqd, q->mqd, q->pipe, q->queue,
|
|
&q->properties, q->process->mm);
|
|
|
|
out_unlock:
|
|
mutex_unlock(&dqm->lock);
|
|
return retval;
|
|
}
|
|
|
|
static struct mqd_manager *get_mqd_manager(
|
|
struct device_queue_manager *dqm, enum KFD_MQD_TYPE type)
|
|
{
|
|
struct mqd_manager *mqd;
|
|
|
|
if (WARN_ON(type >= KFD_MQD_TYPE_MAX))
|
|
return NULL;
|
|
|
|
pr_debug("mqd type %d\n", type);
|
|
|
|
mqd = dqm->mqds[type];
|
|
if (!mqd) {
|
|
mqd = mqd_manager_init(type, dqm->dev);
|
|
if (!mqd)
|
|
pr_err("mqd manager is NULL");
|
|
dqm->mqds[type] = mqd;
|
|
}
|
|
|
|
return mqd;
|
|
}
|
|
|
|
static int evict_process_queues_nocpsch(struct device_queue_manager *dqm,
|
|
struct qcm_process_device *qpd)
|
|
{
|
|
struct queue *q;
|
|
struct mqd_manager *mqd;
|
|
struct kfd_process_device *pdd;
|
|
int retval = 0;
|
|
|
|
mutex_lock(&dqm->lock);
|
|
if (qpd->evicted++ > 0) /* already evicted, do nothing */
|
|
goto out;
|
|
|
|
pdd = qpd_to_pdd(qpd);
|
|
pr_info_ratelimited("Evicting PASID %u queues\n",
|
|
pdd->process->pasid);
|
|
|
|
/* unactivate all active queues on the qpd */
|
|
list_for_each_entry(q, &qpd->queues_list, list) {
|
|
if (!q->properties.is_active)
|
|
continue;
|
|
mqd = dqm->ops.get_mqd_manager(dqm,
|
|
get_mqd_type_from_queue_type(q->properties.type));
|
|
if (!mqd) { /* should not be here */
|
|
pr_err("Cannot evict queue, mqd mgr is NULL\n");
|
|
retval = -ENOMEM;
|
|
goto out;
|
|
}
|
|
q->properties.is_evicted = true;
|
|
q->properties.is_active = false;
|
|
retval = mqd->destroy_mqd(mqd, q->mqd,
|
|
KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN,
|
|
KFD_UNMAP_LATENCY_MS, q->pipe, q->queue);
|
|
if (retval)
|
|
goto out;
|
|
dqm->queue_count--;
|
|
}
|
|
|
|
out:
|
|
mutex_unlock(&dqm->lock);
|
|
return retval;
|
|
}
|
|
|
|
static int evict_process_queues_cpsch(struct device_queue_manager *dqm,
|
|
struct qcm_process_device *qpd)
|
|
{
|
|
struct queue *q;
|
|
struct kfd_process_device *pdd;
|
|
int retval = 0;
|
|
|
|
mutex_lock(&dqm->lock);
|
|
if (qpd->evicted++ > 0) /* already evicted, do nothing */
|
|
goto out;
|
|
|
|
pdd = qpd_to_pdd(qpd);
|
|
pr_info_ratelimited("Evicting PASID %u queues\n",
|
|
pdd->process->pasid);
|
|
|
|
/* unactivate all active queues on the qpd */
|
|
list_for_each_entry(q, &qpd->queues_list, list) {
|
|
if (!q->properties.is_active)
|
|
continue;
|
|
q->properties.is_evicted = true;
|
|
q->properties.is_active = false;
|
|
dqm->queue_count--;
|
|
}
|
|
retval = execute_queues_cpsch(dqm,
|
|
qpd->is_debug ?
|
|
KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES :
|
|
KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
|
|
|
|
out:
|
|
mutex_unlock(&dqm->lock);
|
|
return retval;
|
|
}
|
|
|
|
static int restore_process_queues_nocpsch(struct device_queue_manager *dqm,
|
|
struct qcm_process_device *qpd)
|
|
{
|
|
struct queue *q;
|
|
struct mqd_manager *mqd;
|
|
struct kfd_process_device *pdd;
|
|
uint32_t pd_base;
|
|
int retval = 0;
|
|
|
|
pdd = qpd_to_pdd(qpd);
|
|
/* Retrieve PD base */
|
|
pd_base = dqm->dev->kfd2kgd->get_process_page_dir(pdd->vm);
|
|
|
|
mutex_lock(&dqm->lock);
|
|
if (WARN_ON_ONCE(!qpd->evicted)) /* already restored, do nothing */
|
|
goto out;
|
|
if (qpd->evicted > 1) { /* ref count still > 0, decrement & quit */
|
|
qpd->evicted--;
|
|
goto out;
|
|
}
|
|
|
|
pr_info_ratelimited("Restoring PASID %u queues\n",
|
|
pdd->process->pasid);
|
|
|
|
/* Update PD Base in QPD */
|
|
qpd->page_table_base = pd_base;
|
|
pr_debug("Updated PD address to 0x%08x\n", pd_base);
|
|
|
|
if (!list_empty(&qpd->queues_list)) {
|
|
dqm->dev->kfd2kgd->set_vm_context_page_table_base(
|
|
dqm->dev->kgd,
|
|
qpd->vmid,
|
|
qpd->page_table_base);
|
|
kfd_flush_tlb(pdd);
|
|
}
|
|
|
|
/* activate all active queues on the qpd */
|
|
list_for_each_entry(q, &qpd->queues_list, list) {
|
|
if (!q->properties.is_evicted)
|
|
continue;
|
|
mqd = dqm->ops.get_mqd_manager(dqm,
|
|
get_mqd_type_from_queue_type(q->properties.type));
|
|
if (!mqd) { /* should not be here */
|
|
pr_err("Cannot restore queue, mqd mgr is NULL\n");
|
|
retval = -ENOMEM;
|
|
goto out;
|
|
}
|
|
q->properties.is_evicted = false;
|
|
q->properties.is_active = true;
|
|
retval = mqd->load_mqd(mqd, q->mqd, q->pipe,
|
|
q->queue, &q->properties,
|
|
q->process->mm);
|
|
if (retval)
|
|
goto out;
|
|
dqm->queue_count++;
|
|
}
|
|
qpd->evicted = 0;
|
|
out:
|
|
mutex_unlock(&dqm->lock);
|
|
return retval;
|
|
}
|
|
|
|
static int restore_process_queues_cpsch(struct device_queue_manager *dqm,
|
|
struct qcm_process_device *qpd)
|
|
{
|
|
struct queue *q;
|
|
struct kfd_process_device *pdd;
|
|
uint32_t pd_base;
|
|
int retval = 0;
|
|
|
|
pdd = qpd_to_pdd(qpd);
|
|
/* Retrieve PD base */
|
|
pd_base = dqm->dev->kfd2kgd->get_process_page_dir(pdd->vm);
|
|
|
|
mutex_lock(&dqm->lock);
|
|
if (WARN_ON_ONCE(!qpd->evicted)) /* already restored, do nothing */
|
|
goto out;
|
|
if (qpd->evicted > 1) { /* ref count still > 0, decrement & quit */
|
|
qpd->evicted--;
|
|
goto out;
|
|
}
|
|
|
|
pr_info_ratelimited("Restoring PASID %u queues\n",
|
|
pdd->process->pasid);
|
|
|
|
/* Update PD Base in QPD */
|
|
qpd->page_table_base = pd_base;
|
|
pr_debug("Updated PD address to 0x%08x\n", pd_base);
|
|
|
|
/* activate all active queues on the qpd */
|
|
list_for_each_entry(q, &qpd->queues_list, list) {
|
|
if (!q->properties.is_evicted)
|
|
continue;
|
|
q->properties.is_evicted = false;
|
|
q->properties.is_active = true;
|
|
dqm->queue_count++;
|
|
}
|
|
retval = execute_queues_cpsch(dqm,
|
|
KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
|
|
if (!retval)
|
|
qpd->evicted = 0;
|
|
out:
|
|
mutex_unlock(&dqm->lock);
|
|
return retval;
|
|
}
|
|
|
|
static int register_process(struct device_queue_manager *dqm,
|
|
struct qcm_process_device *qpd)
|
|
{
|
|
struct device_process_node *n;
|
|
struct kfd_process_device *pdd;
|
|
uint32_t pd_base;
|
|
int retval;
|
|
|
|
n = kzalloc(sizeof(*n), GFP_KERNEL);
|
|
if (!n)
|
|
return -ENOMEM;
|
|
|
|
n->qpd = qpd;
|
|
|
|
pdd = qpd_to_pdd(qpd);
|
|
/* Retrieve PD base */
|
|
pd_base = dqm->dev->kfd2kgd->get_process_page_dir(pdd->vm);
|
|
|
|
mutex_lock(&dqm->lock);
|
|
list_add(&n->list, &dqm->queues);
|
|
|
|
/* Update PD Base in QPD */
|
|
qpd->page_table_base = pd_base;
|
|
|
|
retval = dqm->asic_ops.update_qpd(dqm, qpd);
|
|
|
|
dqm->processes_count++;
|
|
|
|
mutex_unlock(&dqm->lock);
|
|
|
|
return retval;
|
|
}
|
|
|
|
static int unregister_process(struct device_queue_manager *dqm,
|
|
struct qcm_process_device *qpd)
|
|
{
|
|
int retval;
|
|
struct device_process_node *cur, *next;
|
|
|
|
pr_debug("qpd->queues_list is %s\n",
|
|
list_empty(&qpd->queues_list) ? "empty" : "not empty");
|
|
|
|
retval = 0;
|
|
mutex_lock(&dqm->lock);
|
|
|
|
list_for_each_entry_safe(cur, next, &dqm->queues, list) {
|
|
if (qpd == cur->qpd) {
|
|
list_del(&cur->list);
|
|
kfree(cur);
|
|
dqm->processes_count--;
|
|
goto out;
|
|
}
|
|
}
|
|
/* qpd not found in dqm list */
|
|
retval = 1;
|
|
out:
|
|
mutex_unlock(&dqm->lock);
|
|
return retval;
|
|
}
|
|
|
|
static int
|
|
set_pasid_vmid_mapping(struct device_queue_manager *dqm, unsigned int pasid,
|
|
unsigned int vmid)
|
|
{
|
|
uint32_t pasid_mapping;
|
|
|
|
pasid_mapping = (pasid == 0) ? 0 :
|
|
(uint32_t)pasid |
|
|
ATC_VMID_PASID_MAPPING_VALID;
|
|
|
|
return dqm->dev->kfd2kgd->set_pasid_vmid_mapping(
|
|
dqm->dev->kgd, pasid_mapping,
|
|
vmid);
|
|
}
|
|
|
|
static void init_interrupts(struct device_queue_manager *dqm)
|
|
{
|
|
unsigned int i;
|
|
|
|
for (i = 0 ; i < get_pipes_per_mec(dqm) ; i++)
|
|
if (is_pipe_enabled(dqm, 0, i))
|
|
dqm->dev->kfd2kgd->init_interrupts(dqm->dev->kgd, i);
|
|
}
|
|
|
|
static int initialize_nocpsch(struct device_queue_manager *dqm)
|
|
{
|
|
int pipe, queue;
|
|
|
|
pr_debug("num of pipes: %d\n", get_pipes_per_mec(dqm));
|
|
|
|
dqm->allocated_queues = kcalloc(get_pipes_per_mec(dqm),
|
|
sizeof(unsigned int), GFP_KERNEL);
|
|
if (!dqm->allocated_queues)
|
|
return -ENOMEM;
|
|
|
|
mutex_init(&dqm->lock);
|
|
INIT_LIST_HEAD(&dqm->queues);
|
|
dqm->queue_count = dqm->next_pipe_to_allocate = 0;
|
|
dqm->sdma_queue_count = 0;
|
|
|
|
for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) {
|
|
int pipe_offset = pipe * get_queues_per_pipe(dqm);
|
|
|
|
for (queue = 0; queue < get_queues_per_pipe(dqm); queue++)
|
|
if (test_bit(pipe_offset + queue,
|
|
dqm->dev->shared_resources.queue_bitmap))
|
|
dqm->allocated_queues[pipe] |= 1 << queue;
|
|
}
|
|
|
|
dqm->vmid_bitmap = (1 << dqm->dev->vm_info.vmid_num_kfd) - 1;
|
|
dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void uninitialize(struct device_queue_manager *dqm)
|
|
{
|
|
int i;
|
|
|
|
WARN_ON(dqm->queue_count > 0 || dqm->processes_count > 0);
|
|
|
|
kfree(dqm->allocated_queues);
|
|
for (i = 0 ; i < KFD_MQD_TYPE_MAX ; i++)
|
|
kfree(dqm->mqds[i]);
|
|
mutex_destroy(&dqm->lock);
|
|
kfd_gtt_sa_free(dqm->dev, dqm->pipeline_mem);
|
|
}
|
|
|
|
static int start_nocpsch(struct device_queue_manager *dqm)
|
|
{
|
|
init_interrupts(dqm);
|
|
return pm_init(&dqm->packets, dqm);
|
|
}
|
|
|
|
static int stop_nocpsch(struct device_queue_manager *dqm)
|
|
{
|
|
pm_uninit(&dqm->packets);
|
|
return 0;
|
|
}
|
|
|
|
static int allocate_sdma_queue(struct device_queue_manager *dqm,
|
|
unsigned int *sdma_queue_id)
|
|
{
|
|
int bit;
|
|
|
|
if (dqm->sdma_bitmap == 0)
|
|
return -ENOMEM;
|
|
|
|
bit = ffs(dqm->sdma_bitmap) - 1;
|
|
dqm->sdma_bitmap &= ~(1 << bit);
|
|
*sdma_queue_id = bit;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void deallocate_sdma_queue(struct device_queue_manager *dqm,
|
|
unsigned int sdma_queue_id)
|
|
{
|
|
if (sdma_queue_id >= CIK_SDMA_QUEUES)
|
|
return;
|
|
dqm->sdma_bitmap |= (1 << sdma_queue_id);
|
|
}
|
|
|
|
static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
|
|
struct queue *q,
|
|
struct qcm_process_device *qpd)
|
|
{
|
|
struct mqd_manager *mqd;
|
|
int retval;
|
|
|
|
mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_SDMA);
|
|
if (!mqd)
|
|
return -ENOMEM;
|
|
|
|
retval = allocate_sdma_queue(dqm, &q->sdma_id);
|
|
if (retval)
|
|
return retval;
|
|
|
|
q->properties.sdma_queue_id = q->sdma_id / CIK_SDMA_QUEUES_PER_ENGINE;
|
|
q->properties.sdma_engine_id = q->sdma_id % CIK_SDMA_QUEUES_PER_ENGINE;
|
|
|
|
retval = allocate_doorbell(qpd, q);
|
|
if (retval)
|
|
goto out_deallocate_sdma_queue;
|
|
|
|
pr_debug("SDMA id is: %d\n", q->sdma_id);
|
|
pr_debug("SDMA queue id: %d\n", q->properties.sdma_queue_id);
|
|
pr_debug("SDMA engine id: %d\n", q->properties.sdma_engine_id);
|
|
|
|
dqm->asic_ops.init_sdma_vm(dqm, q, qpd);
|
|
retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
|
|
&q->gart_mqd_addr, &q->properties);
|
|
if (retval)
|
|
goto out_deallocate_doorbell;
|
|
|
|
retval = mqd->load_mqd(mqd, q->mqd, 0, 0, &q->properties, NULL);
|
|
if (retval)
|
|
goto out_uninit_mqd;
|
|
|
|
return 0;
|
|
|
|
out_uninit_mqd:
|
|
mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
|
|
out_deallocate_doorbell:
|
|
deallocate_doorbell(qpd, q);
|
|
out_deallocate_sdma_queue:
|
|
deallocate_sdma_queue(dqm, q->sdma_id);
|
|
|
|
return retval;
|
|
}
|
|
|
|
/*
|
|
* Device Queue Manager implementation for cp scheduler
|
|
*/
|
|
|
|
static int set_sched_resources(struct device_queue_manager *dqm)
|
|
{
|
|
int i, mec;
|
|
struct scheduling_resources res;
|
|
|
|
res.vmid_mask = dqm->dev->shared_resources.compute_vmid_bitmap;
|
|
|
|
res.queue_mask = 0;
|
|
for (i = 0; i < KGD_MAX_QUEUES; ++i) {
|
|
mec = (i / dqm->dev->shared_resources.num_queue_per_pipe)
|
|
/ dqm->dev->shared_resources.num_pipe_per_mec;
|
|
|
|
if (!test_bit(i, dqm->dev->shared_resources.queue_bitmap))
|
|
continue;
|
|
|
|
/* only acquire queues from the first MEC */
|
|
if (mec > 0)
|
|
continue;
|
|
|
|
/* This situation may be hit in the future if a new HW
|
|
* generation exposes more than 64 queues. If so, the
|
|
* definition of res.queue_mask needs updating
|
|
*/
|
|
if (WARN_ON(i >= (sizeof(res.queue_mask)*8))) {
|
|
pr_err("Invalid queue enabled by amdgpu: %d\n", i);
|
|
break;
|
|
}
|
|
|
|
res.queue_mask |= (1ull << i);
|
|
}
|
|
res.gws_mask = res.oac_mask = res.gds_heap_base =
|
|
res.gds_heap_size = 0;
|
|
|
|
pr_debug("Scheduling resources:\n"
|
|
"vmid mask: 0x%8X\n"
|
|
"queue mask: 0x%8llX\n",
|
|
res.vmid_mask, res.queue_mask);
|
|
|
|
return pm_send_set_resources(&dqm->packets, &res);
|
|
}
|
|
|
|
static int initialize_cpsch(struct device_queue_manager *dqm)
|
|
{
|
|
pr_debug("num of pipes: %d\n", get_pipes_per_mec(dqm));
|
|
|
|
mutex_init(&dqm->lock);
|
|
INIT_LIST_HEAD(&dqm->queues);
|
|
dqm->queue_count = dqm->processes_count = 0;
|
|
dqm->sdma_queue_count = 0;
|
|
dqm->active_runlist = false;
|
|
dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int start_cpsch(struct device_queue_manager *dqm)
|
|
{
|
|
int retval;
|
|
|
|
retval = 0;
|
|
|
|
retval = pm_init(&dqm->packets, dqm);
|
|
if (retval)
|
|
goto fail_packet_manager_init;
|
|
|
|
retval = set_sched_resources(dqm);
|
|
if (retval)
|
|
goto fail_set_sched_resources;
|
|
|
|
pr_debug("Allocating fence memory\n");
|
|
|
|
/* allocate fence memory on the gart */
|
|
retval = kfd_gtt_sa_allocate(dqm->dev, sizeof(*dqm->fence_addr),
|
|
&dqm->fence_mem);
|
|
|
|
if (retval)
|
|
goto fail_allocate_vidmem;
|
|
|
|
dqm->fence_addr = dqm->fence_mem->cpu_ptr;
|
|
dqm->fence_gpu_addr = dqm->fence_mem->gpu_addr;
|
|
|
|
init_interrupts(dqm);
|
|
|
|
mutex_lock(&dqm->lock);
|
|
execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
|
|
mutex_unlock(&dqm->lock);
|
|
|
|
return 0;
|
|
fail_allocate_vidmem:
|
|
fail_set_sched_resources:
|
|
pm_uninit(&dqm->packets);
|
|
fail_packet_manager_init:
|
|
return retval;
|
|
}
|
|
|
|
static int stop_cpsch(struct device_queue_manager *dqm)
|
|
{
|
|
mutex_lock(&dqm->lock);
|
|
unmap_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0);
|
|
mutex_unlock(&dqm->lock);
|
|
|
|
kfd_gtt_sa_free(dqm->dev, dqm->fence_mem);
|
|
pm_uninit(&dqm->packets);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int create_kernel_queue_cpsch(struct device_queue_manager *dqm,
|
|
struct kernel_queue *kq,
|
|
struct qcm_process_device *qpd)
|
|
{
|
|
mutex_lock(&dqm->lock);
|
|
if (dqm->total_queue_count >= max_num_of_queues_per_device) {
|
|
pr_warn("Can't create new kernel queue because %d queues were already created\n",
|
|
dqm->total_queue_count);
|
|
mutex_unlock(&dqm->lock);
|
|
return -EPERM;
|
|
}
|
|
|
|
/*
|
|
* Unconditionally increment this counter, regardless of the queue's
|
|
* type or whether the queue is active.
|
|
*/
|
|
dqm->total_queue_count++;
|
|
pr_debug("Total of %d queues are accountable so far\n",
|
|
dqm->total_queue_count);
|
|
|
|
list_add(&kq->list, &qpd->priv_queue_list);
|
|
dqm->queue_count++;
|
|
qpd->is_debug = true;
|
|
execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
|
|
mutex_unlock(&dqm->lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void destroy_kernel_queue_cpsch(struct device_queue_manager *dqm,
|
|
struct kernel_queue *kq,
|
|
struct qcm_process_device *qpd)
|
|
{
|
|
mutex_lock(&dqm->lock);
|
|
list_del(&kq->list);
|
|
dqm->queue_count--;
|
|
qpd->is_debug = false;
|
|
execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0);
|
|
/*
|
|
* Unconditionally decrement this counter, regardless of the queue's
|
|
* type.
|
|
*/
|
|
dqm->total_queue_count--;
|
|
pr_debug("Total of %d queues are accountable so far\n",
|
|
dqm->total_queue_count);
|
|
mutex_unlock(&dqm->lock);
|
|
}
|
|
|
|
static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q,
|
|
struct qcm_process_device *qpd)
|
|
{
|
|
int retval;
|
|
struct mqd_manager *mqd;
|
|
|
|
retval = 0;
|
|
|
|
mutex_lock(&dqm->lock);
|
|
|
|
if (dqm->total_queue_count >= max_num_of_queues_per_device) {
|
|
pr_warn("Can't create new usermode queue because %d queues were already created\n",
|
|
dqm->total_queue_count);
|
|
retval = -EPERM;
|
|
goto out_unlock;
|
|
}
|
|
|
|
if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
|
|
retval = allocate_sdma_queue(dqm, &q->sdma_id);
|
|
if (retval)
|
|
goto out_unlock;
|
|
q->properties.sdma_queue_id =
|
|
q->sdma_id / CIK_SDMA_QUEUES_PER_ENGINE;
|
|
q->properties.sdma_engine_id =
|
|
q->sdma_id % CIK_SDMA_QUEUES_PER_ENGINE;
|
|
}
|
|
|
|
retval = allocate_doorbell(qpd, q);
|
|
if (retval)
|
|
goto out_deallocate_sdma_queue;
|
|
|
|
mqd = dqm->ops.get_mqd_manager(dqm,
|
|
get_mqd_type_from_queue_type(q->properties.type));
|
|
|
|
if (!mqd) {
|
|
retval = -ENOMEM;
|
|
goto out_deallocate_doorbell;
|
|
}
|
|
/*
|
|
* Eviction state logic: we only mark active queues as evicted
|
|
* to avoid the overhead of restoring inactive queues later
|
|
*/
|
|
if (qpd->evicted)
|
|
q->properties.is_evicted = (q->properties.queue_size > 0 &&
|
|
q->properties.queue_percent > 0 &&
|
|
q->properties.queue_address != 0);
|
|
|
|
dqm->asic_ops.init_sdma_vm(dqm, q, qpd);
|
|
|
|
q->properties.tba_addr = qpd->tba_addr;
|
|
q->properties.tma_addr = qpd->tma_addr;
|
|
retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
|
|
&q->gart_mqd_addr, &q->properties);
|
|
if (retval)
|
|
goto out_deallocate_doorbell;
|
|
|
|
list_add(&q->list, &qpd->queues_list);
|
|
qpd->queue_count++;
|
|
if (q->properties.is_active) {
|
|
dqm->queue_count++;
|
|
retval = execute_queues_cpsch(dqm,
|
|
KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
|
|
}
|
|
|
|
if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
|
|
dqm->sdma_queue_count++;
|
|
/*
|
|
* Unconditionally increment this counter, regardless of the queue's
|
|
* type or whether the queue is active.
|
|
*/
|
|
dqm->total_queue_count++;
|
|
|
|
pr_debug("Total of %d queues are accountable so far\n",
|
|
dqm->total_queue_count);
|
|
|
|
mutex_unlock(&dqm->lock);
|
|
return retval;
|
|
|
|
out_deallocate_doorbell:
|
|
deallocate_doorbell(qpd, q);
|
|
out_deallocate_sdma_queue:
|
|
if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
|
|
deallocate_sdma_queue(dqm, q->sdma_id);
|
|
out_unlock:
|
|
mutex_unlock(&dqm->lock);
|
|
return retval;
|
|
}
|
|
|
|
int amdkfd_fence_wait_timeout(unsigned int *fence_addr,
|
|
unsigned int fence_value,
|
|
unsigned int timeout_ms)
|
|
{
|
|
unsigned long end_jiffies = msecs_to_jiffies(timeout_ms) + jiffies;
|
|
|
|
while (*fence_addr != fence_value) {
|
|
if (time_after(jiffies, end_jiffies)) {
|
|
pr_err("qcm fence wait loop timeout expired\n");
|
|
return -ETIME;
|
|
}
|
|
schedule();
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int unmap_sdma_queues(struct device_queue_manager *dqm,
|
|
unsigned int sdma_engine)
|
|
{
|
|
return pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_SDMA,
|
|
KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0, false,
|
|
sdma_engine);
|
|
}
|
|
|
|
/* dqm->lock mutex has to be locked before calling this function */
|
|
static int map_queues_cpsch(struct device_queue_manager *dqm)
|
|
{
|
|
int retval;
|
|
|
|
if (dqm->queue_count <= 0 || dqm->processes_count <= 0)
|
|
return 0;
|
|
|
|
if (dqm->active_runlist)
|
|
return 0;
|
|
|
|
retval = pm_send_runlist(&dqm->packets, &dqm->queues);
|
|
if (retval) {
|
|
pr_err("failed to execute runlist\n");
|
|
return retval;
|
|
}
|
|
dqm->active_runlist = true;
|
|
|
|
return retval;
|
|
}
|
|
|
|
/* dqm->lock mutex has to be locked before calling this function */
|
|
static int unmap_queues_cpsch(struct device_queue_manager *dqm,
|
|
enum kfd_unmap_queues_filter filter,
|
|
uint32_t filter_param)
|
|
{
|
|
int retval = 0;
|
|
|
|
if (!dqm->active_runlist)
|
|
return retval;
|
|
|
|
pr_debug("Before destroying queues, sdma queue count is : %u\n",
|
|
dqm->sdma_queue_count);
|
|
|
|
if (dqm->sdma_queue_count > 0) {
|
|
unmap_sdma_queues(dqm, 0);
|
|
unmap_sdma_queues(dqm, 1);
|
|
}
|
|
|
|
retval = pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_COMPUTE,
|
|
filter, filter_param, false, 0);
|
|
if (retval)
|
|
return retval;
|
|
|
|
*dqm->fence_addr = KFD_FENCE_INIT;
|
|
pm_send_query_status(&dqm->packets, dqm->fence_gpu_addr,
|
|
KFD_FENCE_COMPLETED);
|
|
/* should be timed out */
|
|
retval = amdkfd_fence_wait_timeout(dqm->fence_addr, KFD_FENCE_COMPLETED,
|
|
QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS);
|
|
if (retval)
|
|
return retval;
|
|
|
|
pm_release_ib(&dqm->packets);
|
|
dqm->active_runlist = false;
|
|
|
|
return retval;
|
|
}
|
|
|
|
/* dqm->lock mutex has to be locked before calling this function */
|
|
static int execute_queues_cpsch(struct device_queue_manager *dqm,
|
|
enum kfd_unmap_queues_filter filter,
|
|
uint32_t filter_param)
|
|
{
|
|
int retval;
|
|
|
|
retval = unmap_queues_cpsch(dqm, filter, filter_param);
|
|
if (retval) {
|
|
pr_err("The cp might be in an unrecoverable state due to an unsuccessful queues preemption\n");
|
|
return retval;
|
|
}
|
|
|
|
return map_queues_cpsch(dqm);
|
|
}
|
|
|
|
static int destroy_queue_cpsch(struct device_queue_manager *dqm,
|
|
struct qcm_process_device *qpd,
|
|
struct queue *q)
|
|
{
|
|
int retval;
|
|
struct mqd_manager *mqd;
|
|
bool preempt_all_queues;
|
|
|
|
preempt_all_queues = false;
|
|
|
|
retval = 0;
|
|
|
|
/* remove queue from list to prevent rescheduling after preemption */
|
|
mutex_lock(&dqm->lock);
|
|
|
|
if (qpd->is_debug) {
|
|
/*
|
|
* error, currently we do not allow to destroy a queue
|
|
* of a currently debugged process
|
|
*/
|
|
retval = -EBUSY;
|
|
goto failed_try_destroy_debugged_queue;
|
|
|
|
}
|
|
|
|
mqd = dqm->ops.get_mqd_manager(dqm,
|
|
get_mqd_type_from_queue_type(q->properties.type));
|
|
if (!mqd) {
|
|
retval = -ENOMEM;
|
|
goto failed;
|
|
}
|
|
|
|
deallocate_doorbell(qpd, q);
|
|
|
|
if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
|
|
dqm->sdma_queue_count--;
|
|
deallocate_sdma_queue(dqm, q->sdma_id);
|
|
}
|
|
|
|
list_del(&q->list);
|
|
qpd->queue_count--;
|
|
if (q->properties.is_active) {
|
|
dqm->queue_count--;
|
|
retval = execute_queues_cpsch(dqm,
|
|
KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
|
|
if (retval == -ETIME)
|
|
qpd->reset_wavefronts = true;
|
|
}
|
|
|
|
mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
|
|
|
|
/*
|
|
* Unconditionally decrement this counter, regardless of the queue's
|
|
* type
|
|
*/
|
|
dqm->total_queue_count--;
|
|
pr_debug("Total of %d queues are accountable so far\n",
|
|
dqm->total_queue_count);
|
|
|
|
mutex_unlock(&dqm->lock);
|
|
|
|
return retval;
|
|
|
|
failed:
|
|
failed_try_destroy_debugged_queue:
|
|
|
|
mutex_unlock(&dqm->lock);
|
|
return retval;
|
|
}
|
|
|
|
/*
|
|
* Low bits must be 0000/FFFF as required by HW, high bits must be 0 to
|
|
* stay in user mode.
|
|
*/
|
|
#define APE1_FIXED_BITS_MASK 0xFFFF80000000FFFFULL
|
|
/* APE1 limit is inclusive and 64K aligned. */
|
|
#define APE1_LIMIT_ALIGNMENT 0xFFFF
|
|
|
|
static bool set_cache_memory_policy(struct device_queue_manager *dqm,
|
|
struct qcm_process_device *qpd,
|
|
enum cache_policy default_policy,
|
|
enum cache_policy alternate_policy,
|
|
void __user *alternate_aperture_base,
|
|
uint64_t alternate_aperture_size)
|
|
{
|
|
bool retval = true;
|
|
|
|
if (!dqm->asic_ops.set_cache_memory_policy)
|
|
return retval;
|
|
|
|
mutex_lock(&dqm->lock);
|
|
|
|
if (alternate_aperture_size == 0) {
|
|
/* base > limit disables APE1 */
|
|
qpd->sh_mem_ape1_base = 1;
|
|
qpd->sh_mem_ape1_limit = 0;
|
|
} else {
|
|
/*
|
|
* In FSA64, APE1_Base[63:0] = { 16{SH_MEM_APE1_BASE[31]},
|
|
* SH_MEM_APE1_BASE[31:0], 0x0000 }
|
|
* APE1_Limit[63:0] = { 16{SH_MEM_APE1_LIMIT[31]},
|
|
* SH_MEM_APE1_LIMIT[31:0], 0xFFFF }
|
|
* Verify that the base and size parameters can be
|
|
* represented in this format and convert them.
|
|
* Additionally restrict APE1 to user-mode addresses.
|
|
*/
|
|
|
|
uint64_t base = (uintptr_t)alternate_aperture_base;
|
|
uint64_t limit = base + alternate_aperture_size - 1;
|
|
|
|
if (limit <= base || (base & APE1_FIXED_BITS_MASK) != 0 ||
|
|
(limit & APE1_FIXED_BITS_MASK) != APE1_LIMIT_ALIGNMENT) {
|
|
retval = false;
|
|
goto out;
|
|
}
|
|
|
|
qpd->sh_mem_ape1_base = base >> 16;
|
|
qpd->sh_mem_ape1_limit = limit >> 16;
|
|
}
|
|
|
|
retval = dqm->asic_ops.set_cache_memory_policy(
|
|
dqm,
|
|
qpd,
|
|
default_policy,
|
|
alternate_policy,
|
|
alternate_aperture_base,
|
|
alternate_aperture_size);
|
|
|
|
if ((dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) && (qpd->vmid != 0))
|
|
program_sh_mem_settings(dqm, qpd);
|
|
|
|
pr_debug("sh_mem_config: 0x%x, ape1_base: 0x%x, ape1_limit: 0x%x\n",
|
|
qpd->sh_mem_config, qpd->sh_mem_ape1_base,
|
|
qpd->sh_mem_ape1_limit);
|
|
|
|
out:
|
|
mutex_unlock(&dqm->lock);
|
|
return retval;
|
|
}
|
|
|
|
static int set_trap_handler(struct device_queue_manager *dqm,
|
|
struct qcm_process_device *qpd,
|
|
uint64_t tba_addr,
|
|
uint64_t tma_addr)
|
|
{
|
|
uint64_t *tma;
|
|
|
|
if (dqm->dev->cwsr_enabled) {
|
|
/* Jump from CWSR trap handler to user trap */
|
|
tma = (uint64_t *)(qpd->cwsr_kaddr + KFD_CWSR_TMA_OFFSET);
|
|
tma[0] = tba_addr;
|
|
tma[1] = tma_addr;
|
|
} else {
|
|
qpd->tba_addr = tba_addr;
|
|
qpd->tma_addr = tma_addr;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int process_termination_nocpsch(struct device_queue_manager *dqm,
|
|
struct qcm_process_device *qpd)
|
|
{
|
|
struct queue *q, *next;
|
|
struct device_process_node *cur, *next_dpn;
|
|
int retval = 0;
|
|
|
|
mutex_lock(&dqm->lock);
|
|
|
|
/* Clear all user mode queues */
|
|
list_for_each_entry_safe(q, next, &qpd->queues_list, list) {
|
|
int ret;
|
|
|
|
ret = destroy_queue_nocpsch_locked(dqm, qpd, q);
|
|
if (ret)
|
|
retval = ret;
|
|
}
|
|
|
|
/* Unregister process */
|
|
list_for_each_entry_safe(cur, next_dpn, &dqm->queues, list) {
|
|
if (qpd == cur->qpd) {
|
|
list_del(&cur->list);
|
|
kfree(cur);
|
|
dqm->processes_count--;
|
|
break;
|
|
}
|
|
}
|
|
|
|
mutex_unlock(&dqm->lock);
|
|
return retval;
|
|
}
|
|
|
|
|
|
static int process_termination_cpsch(struct device_queue_manager *dqm,
|
|
struct qcm_process_device *qpd)
|
|
{
|
|
int retval;
|
|
struct queue *q, *next;
|
|
struct kernel_queue *kq, *kq_next;
|
|
struct mqd_manager *mqd;
|
|
struct device_process_node *cur, *next_dpn;
|
|
enum kfd_unmap_queues_filter filter =
|
|
KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES;
|
|
|
|
retval = 0;
|
|
|
|
mutex_lock(&dqm->lock);
|
|
|
|
/* Clean all kernel queues */
|
|
list_for_each_entry_safe(kq, kq_next, &qpd->priv_queue_list, list) {
|
|
list_del(&kq->list);
|
|
dqm->queue_count--;
|
|
qpd->is_debug = false;
|
|
dqm->total_queue_count--;
|
|
filter = KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES;
|
|
}
|
|
|
|
/* Clear all user mode queues */
|
|
list_for_each_entry(q, &qpd->queues_list, list) {
|
|
if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
|
|
dqm->sdma_queue_count--;
|
|
deallocate_sdma_queue(dqm, q->sdma_id);
|
|
}
|
|
|
|
if (q->properties.is_active)
|
|
dqm->queue_count--;
|
|
|
|
dqm->total_queue_count--;
|
|
}
|
|
|
|
/* Unregister process */
|
|
list_for_each_entry_safe(cur, next_dpn, &dqm->queues, list) {
|
|
if (qpd == cur->qpd) {
|
|
list_del(&cur->list);
|
|
kfree(cur);
|
|
dqm->processes_count--;
|
|
break;
|
|
}
|
|
}
|
|
|
|
retval = execute_queues_cpsch(dqm, filter, 0);
|
|
if (retval || qpd->reset_wavefronts) {
|
|
pr_warn("Resetting wave fronts (cpsch) on dev %p\n", dqm->dev);
|
|
dbgdev_wave_reset_wavefronts(dqm->dev, qpd->pqm->process);
|
|
qpd->reset_wavefronts = false;
|
|
}
|
|
|
|
/* lastly, free mqd resources */
|
|
list_for_each_entry_safe(q, next, &qpd->queues_list, list) {
|
|
mqd = dqm->ops.get_mqd_manager(dqm,
|
|
get_mqd_type_from_queue_type(q->properties.type));
|
|
if (!mqd) {
|
|
retval = -ENOMEM;
|
|
goto out;
|
|
}
|
|
list_del(&q->list);
|
|
qpd->queue_count--;
|
|
mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
|
|
}
|
|
|
|
out:
|
|
mutex_unlock(&dqm->lock);
|
|
return retval;
|
|
}
|
|
|
|
struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev)
|
|
{
|
|
struct device_queue_manager *dqm;
|
|
|
|
pr_debug("Loading device queue manager\n");
|
|
|
|
dqm = kzalloc(sizeof(*dqm), GFP_KERNEL);
|
|
if (!dqm)
|
|
return NULL;
|
|
|
|
switch (dev->device_info->asic_family) {
|
|
/* HWS is not available on Hawaii. */
|
|
case CHIP_HAWAII:
|
|
/* HWS depends on CWSR for timely dequeue. CWSR is not
|
|
* available on Tonga.
|
|
*
|
|
* FIXME: This argument also applies to Kaveri.
|
|
*/
|
|
case CHIP_TONGA:
|
|
dqm->sched_policy = KFD_SCHED_POLICY_NO_HWS;
|
|
break;
|
|
default:
|
|
dqm->sched_policy = sched_policy;
|
|
break;
|
|
}
|
|
|
|
dqm->dev = dev;
|
|
switch (dqm->sched_policy) {
|
|
case KFD_SCHED_POLICY_HWS:
|
|
case KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION:
|
|
/* initialize dqm for cp scheduling */
|
|
dqm->ops.create_queue = create_queue_cpsch;
|
|
dqm->ops.initialize = initialize_cpsch;
|
|
dqm->ops.start = start_cpsch;
|
|
dqm->ops.stop = stop_cpsch;
|
|
dqm->ops.destroy_queue = destroy_queue_cpsch;
|
|
dqm->ops.update_queue = update_queue;
|
|
dqm->ops.get_mqd_manager = get_mqd_manager;
|
|
dqm->ops.register_process = register_process;
|
|
dqm->ops.unregister_process = unregister_process;
|
|
dqm->ops.uninitialize = uninitialize;
|
|
dqm->ops.create_kernel_queue = create_kernel_queue_cpsch;
|
|
dqm->ops.destroy_kernel_queue = destroy_kernel_queue_cpsch;
|
|
dqm->ops.set_cache_memory_policy = set_cache_memory_policy;
|
|
dqm->ops.set_trap_handler = set_trap_handler;
|
|
dqm->ops.process_termination = process_termination_cpsch;
|
|
dqm->ops.evict_process_queues = evict_process_queues_cpsch;
|
|
dqm->ops.restore_process_queues = restore_process_queues_cpsch;
|
|
break;
|
|
case KFD_SCHED_POLICY_NO_HWS:
|
|
/* initialize dqm for no cp scheduling */
|
|
dqm->ops.start = start_nocpsch;
|
|
dqm->ops.stop = stop_nocpsch;
|
|
dqm->ops.create_queue = create_queue_nocpsch;
|
|
dqm->ops.destroy_queue = destroy_queue_nocpsch;
|
|
dqm->ops.update_queue = update_queue;
|
|
dqm->ops.get_mqd_manager = get_mqd_manager;
|
|
dqm->ops.register_process = register_process;
|
|
dqm->ops.unregister_process = unregister_process;
|
|
dqm->ops.initialize = initialize_nocpsch;
|
|
dqm->ops.uninitialize = uninitialize;
|
|
dqm->ops.set_cache_memory_policy = set_cache_memory_policy;
|
|
dqm->ops.set_trap_handler = set_trap_handler;
|
|
dqm->ops.process_termination = process_termination_nocpsch;
|
|
dqm->ops.evict_process_queues = evict_process_queues_nocpsch;
|
|
dqm->ops.restore_process_queues =
|
|
restore_process_queues_nocpsch;
|
|
break;
|
|
default:
|
|
pr_err("Invalid scheduling policy %d\n", dqm->sched_policy);
|
|
goto out_free;
|
|
}
|
|
|
|
switch (dev->device_info->asic_family) {
|
|
case CHIP_CARRIZO:
|
|
device_queue_manager_init_vi(&dqm->asic_ops);
|
|
break;
|
|
|
|
case CHIP_KAVERI:
|
|
device_queue_manager_init_cik(&dqm->asic_ops);
|
|
break;
|
|
|
|
case CHIP_HAWAII:
|
|
device_queue_manager_init_cik_hawaii(&dqm->asic_ops);
|
|
break;
|
|
|
|
case CHIP_TONGA:
|
|
case CHIP_FIJI:
|
|
case CHIP_POLARIS10:
|
|
case CHIP_POLARIS11:
|
|
device_queue_manager_init_vi_tonga(&dqm->asic_ops);
|
|
break;
|
|
|
|
case CHIP_VEGA10:
|
|
case CHIP_RAVEN:
|
|
device_queue_manager_init_v9(&dqm->asic_ops);
|
|
break;
|
|
default:
|
|
WARN(1, "Unexpected ASIC family %u",
|
|
dev->device_info->asic_family);
|
|
goto out_free;
|
|
}
|
|
|
|
if (!dqm->ops.initialize(dqm))
|
|
return dqm;
|
|
|
|
out_free:
|
|
kfree(dqm);
|
|
return NULL;
|
|
}
|
|
|
|
void device_queue_manager_uninit(struct device_queue_manager *dqm)
|
|
{
|
|
dqm->ops.uninitialize(dqm);
|
|
kfree(dqm);
|
|
}
|
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
|
|
static void seq_reg_dump(struct seq_file *m,
|
|
uint32_t (*dump)[2], uint32_t n_regs)
|
|
{
|
|
uint32_t i, count;
|
|
|
|
for (i = 0, count = 0; i < n_regs; i++) {
|
|
if (count == 0 ||
|
|
dump[i-1][0] + sizeof(uint32_t) != dump[i][0]) {
|
|
seq_printf(m, "%s %08x: %08x",
|
|
i ? "\n" : "",
|
|
dump[i][0], dump[i][1]);
|
|
count = 7;
|
|
} else {
|
|
seq_printf(m, " %08x", dump[i][1]);
|
|
count--;
|
|
}
|
|
}
|
|
|
|
seq_puts(m, "\n");
|
|
}
|
|
|
|
int dqm_debugfs_hqds(struct seq_file *m, void *data)
|
|
{
|
|
struct device_queue_manager *dqm = data;
|
|
uint32_t (*dump)[2], n_regs;
|
|
int pipe, queue;
|
|
int r = 0;
|
|
|
|
r = dqm->dev->kfd2kgd->hqd_dump(dqm->dev->kgd,
|
|
KFD_CIK_HIQ_PIPE, KFD_CIK_HIQ_QUEUE, &dump, &n_regs);
|
|
if (!r) {
|
|
seq_printf(m, " HIQ on MEC %d Pipe %d Queue %d\n",
|
|
KFD_CIK_HIQ_PIPE/get_pipes_per_mec(dqm)+1,
|
|
KFD_CIK_HIQ_PIPE%get_pipes_per_mec(dqm),
|
|
KFD_CIK_HIQ_QUEUE);
|
|
seq_reg_dump(m, dump, n_regs);
|
|
|
|
kfree(dump);
|
|
}
|
|
|
|
for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) {
|
|
int pipe_offset = pipe * get_queues_per_pipe(dqm);
|
|
|
|
for (queue = 0; queue < get_queues_per_pipe(dqm); queue++) {
|
|
if (!test_bit(pipe_offset + queue,
|
|
dqm->dev->shared_resources.queue_bitmap))
|
|
continue;
|
|
|
|
r = dqm->dev->kfd2kgd->hqd_dump(
|
|
dqm->dev->kgd, pipe, queue, &dump, &n_regs);
|
|
if (r)
|
|
break;
|
|
|
|
seq_printf(m, " CP Pipe %d, Queue %d\n",
|
|
pipe, queue);
|
|
seq_reg_dump(m, dump, n_regs);
|
|
|
|
kfree(dump);
|
|
}
|
|
}
|
|
|
|
for (pipe = 0; pipe < CIK_SDMA_ENGINE_NUM; pipe++) {
|
|
for (queue = 0; queue < CIK_SDMA_QUEUES_PER_ENGINE; queue++) {
|
|
r = dqm->dev->kfd2kgd->hqd_sdma_dump(
|
|
dqm->dev->kgd, pipe, queue, &dump, &n_regs);
|
|
if (r)
|
|
break;
|
|
|
|
seq_printf(m, " SDMA Engine %d, RLC %d\n",
|
|
pipe, queue);
|
|
seq_reg_dump(m, dump, n_regs);
|
|
|
|
kfree(dump);
|
|
}
|
|
}
|
|
|
|
return r;
|
|
}
|
|
|
|
#endif
|