fd451b90e7
The GICv3 architecture spec says: Writing to the active priority registers in any order other than the following order will result in UNPREDICTABLE behavior: - ICH_AP0R<n>_EL2. - ICH_AP1R<n>_EL2. So let's not pointlessly go against the rule... Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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.. | ||
hyp | ||
debug.c | ||
emulate.c | ||
guest.c | ||
handle_exit.c | ||
hyp-init.S | ||
hyp.S | ||
inject_fault.c | ||
Kconfig | ||
Makefile | ||
regmap.c | ||
reset.c | ||
sys_regs_generic_v8.c | ||
sys_regs.c | ||
sys_regs.h | ||
trace.h |